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A CF 4 plasma treatment on solid-phase-crystallized ͑SPC͒ poly-Si thin-film transistors ͑TFTs͒ has been demonstrated. Using this technique, fluorine atoms can be introduced into the poly-Si film to passivate the defects, and hence, the device performance of the SPC poly-Si TFTs can be significantly improved. The fluorinated SPC poly-Si TFTs exhibit a good subthreshold slope, low threshold voltage, and high field effect mobility. Moreover, the fluorinated SPC poly-Si TFTs also exhibit an improved hot-carrierstress immunity, which is due to the strong Si-F bonds formed in the poly-Si channel region.Polycrystalline silicon thin-film transistors ͑Poly-Si TFTs͒ have attracted much attention due to the possibility to realize the integration of switching pixels and their peripheral driver circuits on a single glass substrate of active matrix liquid crystal displays ͑AMLCDs͒. 1-3 Compared with conventional amorphous-Si TFTs, poly-Si TFTs have many advantages including higher driving current and greater carrier mobility. However, the trap states in the poly-Si grains and grain boundaries degrade the carrier's transport and increase the off-stated leakage current. 4-6 To eliminate these trap states becomes the main topic for future production of highperformance poly-Si TFTs. Hydrogen-based plasma passivation is the most popular method utilized in the current production. 7-9 Although hydrogenation can passivate the intragrain and grain boundary trap states in the poly-Si film, the hydrogenated poly-Si TFTs suffer from a serious reliability issue, which is attributed to the weak Si-H bonding. Recently, several studies have demonstrated the use of fluorine ͑F͒ atoms to fluorinate poly-Si films, which can improve performance and reliability of poly-Si TFTs, particularly under longterm electrical stress. 10-15 This is because fluorine atoms can terminate dangling bonds and replace weak bonds in the grain boundaries and SiO 2 /poly-Si interface, and thus reduce the trap states in the poly-Si channel. In addition, strong Si-F bonds, more stable than Si-H bonds, can greatly improve device reliability under long-term electrical stress.Fluorine ion implantation ͑FII͒, the most adoptive fluorinating technique, has been investigated. [10][11][12][13] It is worth pointing out that the ion implantation method is no longer suitable for large-sized glass substrate application. Moreover, to activate the fluorine atoms and recover the defects created by FII, a subsequent hightemperature annealing is required. However, the high-temperature process is not compatible with current production. Kim et al. demonstrated the use of fluorinated oxide ͑SiO x F y ͒ to replace FII, which can serve as a diffusion source. 14,15 This technique increases manufacturing processes because extra film deposition and etching processes are necessary. To date, although the effects of fluorination have been investigated and clarified, there is still a lack of a processcompatible technique to introduce fluorine atoms effectively into poly-Si films for the poly-Si TFT...

We demonstrate the fabrication process and the electrical characteristics of n-channel polycrystalline silicon thin-film transistors (poly-Si TFTs) with different numbers of channel stripes. The device's electrical characteristics, such as on-current, threshold voltage, and subthreshold swing, were improved by increasing the number of channel stripes due to the enhancement of gate control. However, the electric field strength near the drain side was enlarged in multi-channel structures, causing severe impact ionization. The degradation of device's reliability under various electrical stress conditions was suggested.

A process-compatible fluorine passivation technique of poly-Si thin-film transistors (TFTs) was demonstrated by employing a novel CF 4 plasma treatment. Introducing fluorine atoms into poly-Si films can effectively passivate the trap states near the SiO 2 /poly-Si interface. With fluorine incorporation, the electrical characteristics of poly-Si TFTs can be significantly improved including a steeper subthreshold slope, smaller threshold voltage, lower leakage current, higher field-effect mobility, and better On/Off current ratio. Furthermore, the CF 4 plasma treatment also improves the reliability of poly-Si TFTs with respect to hot-carrier stress, which is due to the formation of strong Si-F bonds.

We proposed here a reliability model that successfully introduces both the physical mechanisms of negative bias temperature instability (NBTI) and hot carrier stress (HCS) for p-channel low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed model is highly matched with the experimental results, in which the NBTI dominates the device reliability at small negative drain bias while the HCS dominates the degradation at large negative drain bias. In summary, the proposed model provides a comprehensive way to predict the lifetime of the p-channel LTPS TFTs, which is especially necessary for the system-on-panel circuitry design.Index Terms-Hot carrier stress (HCS), low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs), negative bias temperature instability (NBTI), reliability.