A flash-erase EEPROM cell which consists of a single floating gate transistor is described. The cell is based on self-aligned double polysilicon stacked gate structure without a select transistor. It is programmed and erased by hot electrons at the drain edge similar to a W -E P R O N and by FowlerNordheim tunneling of electrons from the floating gate to the source, respectively.An asymmetry in source and drain regions is introduced to enable fast program/erase operation. In addition, an n + concentration in the source region is optimized to achieve reproducible erasure, which is indispensable to avoid over-erasing problem. The optimized cell enables an erasing time of less than one millisecond with 1 2 . 5 V on the source, and a scatter of erased Vth is almost negligible.Endurance and data retention characteristics is also adequate for implementation in memory chips. The small cell area of 9. 3 g m2 is accomplished in a 0. 8 g m techno 1 cgy.

1.AbstractWe have developed for the first time a 4-hit microcontroller (MCU) embedded with 4Kbit ferroelectric non-volatile memory (FeRAM). The M C L integrating FeRAM demonstrates innovative characteristics such as high data storage speed. low dissipalion power and high endurance more than 10" cycles. neither of v\.hich has been realized with EEPROM and Flash EEPROM technology. The performances prove that the MCUs embedded u i t h FeRAM uill be one of "key" processors for multimedia de\,ices such as PDA and cel I ular p h on e. 2.BackgroundMany portable information devices h a i e been emerging in late years for mobile data communication in the multimedia society. Low power dissipation and low, voltage operation L\ ithout an! sacrifice of the operation speed. even higher speed. are the most crucial issues for semiconductor devices to extend the batter! l i f e of the mobile data communication devices. As well as the loa' dissipation power and IOU operation voltage. it is strongly required for M C L to integrate nonvolatile memory. especially in the application ot smart card. in order t o keep high secrecy of the data [ I ] . While SRAM R ith batter) backup system. EEPROM or Flash EEPROM are used for non-volatile data storage in the current devices. none of them has not completely mer above demands. We incorporated FeRAM as data storagc memor!' and realized superb characteristics. 3.FeaturesThe features of embedded FeRAM are shown i n Table 1 compared with those of embedded SRAM and embedded EEPROM SRAM is volatile memory then i t essentiall! needs battery back-up t o maintain stored data. With respect to EEPROM. i t needs d high programming voltage such as 17V This tact leads not onl!, i o the high dissipation power hut also to the increase of chip size due t o the voltage booster circuit Furthermore. i t should he noted that the operation at 17V needs a high coltage tolerant CMOS process. On the other hand. FeRAM can be operated even at 3V with a hieh data programming speed such as 5OOns. These features of embedded FeRAM contribute to extending the batter! life of portable deLices and the operation range of contact-less smart cards. . 0 r g a n i z a tionIn this work. a piggy type generic 4-bit MCU is used tor the MCU port. The embedded FeRAM has 512Kword x 8bit organization and the data I/O ports of the FeRAM are directly connected to the 1/0 ports of the MCU as shown in Figure I . A chip microphotograph is shown in Figure 2 . iCE. /OE, /WE. DO-D7 and AO-A8 terminals of the FeRAM part are connected to P50. P51. P52. POO-P1.1 and P20-P4Oterminals of the MCU part. Terminals that do not belong to ROM port of the MCU part are connected to normal terminals of 64 pin piggy type s h r i n k DIP package. ROM port terminals (ICE.IOE.AOAl5.00-07) are connected to piggy terminals. An EPROM is put into the piggy part of the M C L . The MCU has 4 K bvte ROM space which is assigned in the external EPROM This scheme allows flexible uwrprogramming and also enable "Self-Test" of the FeRAM parr such a5 an endurance test with o ...

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