Frequency dispersion in the accumulation region seen in multifrequency capacitance–voltage characterization, which is believed to be caused mainly by border traps, is a concerning issue in present-day devices. Because these traps are a fundamental property of oxides, their formation is expected to be affected to some extent by the parameters of oxide growth caused by atomic layer deposition (ALD). In this study, the effects of variation in two ALD conditions, deposition temperature and purge time, on the formation of near-interfacial oxide traps in the Al2O3 dielectric are examined. In addition to the evaluation of these border traps, the most commonly examined electrical traps—i.e., interface traps—are also investigated along with the hysteresis, permittivity, reliability, and leakage current. The results reveal that a higher deposition temperature helps to minimize the formation of border traps and suppress leakage current but adversely affects the oxide/semiconductor interface and the permittivity of the deposited film. In contrast, a longer purge time provides a high-quality atomic-layer-deposited film which has fewer electrical traps and reasonable values of permittivity and breakdown voltage. These findings indicate that a moderate ALD temperature along with a sufficiently long purge time will provide an oxide film with fewer electrical traps, a reasonable permittivity, and a low leakage current.

The reliability instability of inhomogeneous Schottky contact behaviors of Ni/Au and Pt/Ti/Pt/Au gate contacts on AlGaN/GaN high-electron-mobility transistors (HEMTs) was investigated via off-state stress and temperature. Under the off-state stress condition, Pt/Ti/Pt/Au HEMT showed abruptly reduced reverse leakage current, which improved the Schottky barrier height (SBH) from 0.46 to 0.69 eV by suppression of the interfacial donor state. As the temperature increased, the reverse leakage current of the Pt/Ti/Pt/Au AlGaN/GaN HEMT at 308 K showed more reduction under the same off-state stress condition while that of the Ni/Au AlGaN/GaN HEMT increased. However, with temperatures exceeding 308 K under the same off-state stress conditions, the reverse leakage current of the Pt/Ti/Pt/Au AlGaN/GaN HEMT increases, which can be intensified using the inverse piezoelectric effect. Based on this phenomenon, the present work reveals the necessity for analyzing the concurrent SBH and reliability instability due to the interfacial trap states of the MS contacts.

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We presented an explicit empirical model of the thermal resistance of AlGaN/GaN high-electron-mobility transistors on three distinct substrates, including sapphire, SiC, and Si. This model considered both a linear and non-linear thermal resistance model of AlGaN/GaN HEMT, the thickness of the host substrate layers, and the gate length and width. The non-linear nature of channel temperature—visible at the high-power dissipation stage—along with linear dependency, was constructed within a single equation. Comparisons with the channel temperature measurement procedure (DC) and charge-control-based device modeling were performed to verify the model’s validity, and the results were in favorable agreement with the observed model data, with only a 1.5% error rate compared to the measurement data. An agile expression for the channel temperature is also important for designing power devices and monolithic microwave integrated circuits. The suggested approach provides several techniques for investigation that could otherwise be impractical or unattainable when utilizing time-consuming numerical simulations.