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A X-band variable gain amplifier (VGA) with low phase variation and high control resolution is presented in 180-nm CMOS. The linear gain VGA and current-type digital-toanalog converter (DAC) are implemented to improve the accuracy of gain control and the robustness against process, supply voltage, and temperature variations (PVT). The measured peak gain and 3-dB bandwidth are 8 dB and 8.5 to 11.6 GHz, respectively. The gain range is 15 dB with a gain step of 1 dB. With a supply voltage varying from 1.6 to 2.0 V, the root-mean-square (RMS) gain and phase errors in 3-dB bandwidth are <0.62 dB and <1.5 , respectively. With supply of 1.8 V, the measured root-meansquare (RMS) gain and phase errors across −25 to 110 C are <0.65 dB and <1.7 , respectively. Comparing the measurement results of five chips, the variation of RMS gain error is <0.24 dB, and the RMS phase errors are almost the same. The measurement results demonstrate the proposed VGA is very suitable for phased arrays in X-band.

This paper presents a 6-bit vector-sum phase shifter with half-quadrant control technique for Ku-band phased arrays. In this paper, the gain and phase symmetry in each quadrant is studied. Based on the gain and phase symmetry in vector-sum phase shifter, the half-quadrant control technique is proposed to simplify the complexity of phase control, phase measurement and phase calibration for large-scale phased arrays. Besides, a phase optimization method without extra phase settings is proposed to achieve low phase error. As results, the measured 6-bit RMS phase error is 1.6 • ∼ 2.3 • across 13 ∼ 17 GHz with only 64 different phase states, demonstrating the brevity and accuracy of phase control simultaneously. With the same phase optimization, six chips are measured and the maximum deviation of RMS phase error is < 0.3 •. The measured peak gain is 3.8 dB at 14.5 GHz, and the measured 3-dB frequency band is 13.4 ∼ 15.5 GHz. The measured RMS gain variation is 0.85 ∼ 1 dB across 3-dB frequency band. The input-referred P1dB is > −11.4 dBm. The chip consumes 29.7 mW with 1.8 V supply and occupies 0.9 × 1.45 mm 2. This work is fabricated in TSMC 180-nm CMOS technology. INDEX TERMS Half-quadrant control technique, gain and phase symmetry, vector-sum phase shifter.