We investigated the annealing effect on single Shockley faults (SSFs) in the SiC epitaxial layers by photoluminescence mapping in combination with high-power laser illumination. Comparing before and after annealing at 350–550°C, it became obvious that annealing results in the shrinking of the faulted area of SSFs. When high-power laser illumination is performed again on the same area annealed at 550°C, the right-angled triangular SSFs reformed into exactly the same features as those before annealing, but the isosceles triangular SSFs did not reform. The annealing temperature to start shrinking the faulted area differs according to the type of SSF.

We investigate basal plane dislocations (BPDs) in thick 4H–SiC(0001) epilayers and the formation of stacking faults in the active region of pin diodes. Synchrotron reflection X-ray topography shows that epitaxial growth on (0001) is advantageous in preventing the propagation of BPDs from the substrate into the epilayer and obtaining a low BPD density in the epilayer compared with growth on (0001). The current stress test of 4H–SiC(0001) pin diodes demonstrates the suppressed formation of stacking faults.

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In this paper, we investigated the density of basal plane dislocations (BPDs) in 4H-SiC epilayers grown on (0001) and (000-1). Re-polishing of the substrate surface, in-situ H2 etching and off-cut angle were found to influence the propagation of BPDs into the epilayers. The epitaxial growth on (000-1) substrates yields a relatively low density of BPDs compared to growth on (0001). The electrical characteristics of pn diodes were also investigated, and the suppressed forward degradation and high-voltage blocking performance were obtained in the use of the (000-1) epilayers.

The dependence of forward voltage degradation on crystal faces for 4H-SiC pin diodes has been investigated. The forward voltage degradation has been reduced by fabricating the diodes on the (000-1) C-face off-angled toward <11-20>. High-voltage 4H-SiC pin diodes on the (000-1) C-face with small forward voltage degradation have also been fabricated successfully. A high breakdown voltage of 4.6 kV and DVf of 0.04 V were achieved for a (000-1) C-face pin diode. A 8.3 kV blocking performance, which is the highest voltage in the use of (000-1) C-face, is also demonstrated in 4H-SiC pin diode.