Voltage source Multilevel Inverters (MLIs) are vital components for medium voltage and high-power applications due to their advantages like modularity and better power quality. However, the number of components used is significant. In this paper, an improved asymmetrical multilevel inverter topology is proposed producing 17-levels output voltage utilizing two dc sources. The circuit is developed to reduce the number of isolated dc-sources used without reducing output levels. The circuit utilizes six two-quadrant switches, three four-quadrant switches and four capacitors. The capacitors are self-balancing and do not require extra attention, i.e. the control system is simple for the proposed MLI. Detailed analysis of the topology under linear and non-linear loading conditions is carried out. Comparison with other similar topologies shows that the proposed topology is superior in device count, power quality, Total Standing Voltage (TSV), and cost factor. The performance of the topology is validated for different load conditions through MATLAB/Simulink environment and the prototype developed in the laboratory. Furthermore, thermal analysis of the circuit is done, and the losses are calculated via PLECS software. The topology offers a total harmonic distortion (THD) of 4.79% in the output voltage, with all the lower order harmonics being less than 5% complying with the IEEE standards.

This paper presents an improved Multi-level Inverter topology utilizing the concept of boosting-capacitor and two DC sources with reduced switches count for generating 17level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other recent topologies shows that the proposed topology employs a reduced number of devices and better performance. The topology combines the modularity of H-Bridge with the boosting capacity of the switched capacitor topology. Special care is taken while designing the switching strategy for voltage balancing of the capacitors. The authors also have generalized the topology to produce 'n' level output. Relevant expressions are also formed and reported. Experimental validation, as well as simulation, is performed, and results are verified. Nearest level control is used as the modulation technique.

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Voltage source multilevel inverters (MLI) is widely utilized in medium and high‐power applications due to their advantages. Here, an 11‐level, asymmetrical multilevel inverter topology is proposed. The topology utilizes four unidirectional switches, three bidirectional switches along with two dc sources. The proposed configuration of switches and the concept of the dc‐link capacitor is utilized to generate eleven level output voltage. The reduced number of components such as power switches and DC sources, lower control complexity due to capacitors' self‐balancing nature, and low total standing voltage (TSV) are the critical features of the proposed topology. Moreover, a reliability assessment of the topology shows that the topology has a high mean time to fault (MTTF), which makes it robust and reliable. Matlab/Simulink environment is used to develop a simulation model of the proposed topology, while PLECS is used for the thermal modelling and analysis of the converter. A prototype is developed and tested in the laboratory to validate the performance for different loading conditions. The proposed topology can be cascaded to produce the ‘n’ number of levels. The critical comparison of the proposed topology shows that the proposed circuit has advantages over other compared topologies.