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This paper reviews the three dominant E2 technologies today, namely the two floating gate approaches of thin tunnel oxide and oxide on textured poly and the dual dielectric approach of MNOS. It evaluates each approach with respect to cell design, operation, manufacturability, compatibility with established process technologies and reliability. It follows with a comparison of the technologies in the areas of development entry cost, scaling and reliability. After a review of the market Place. this DaDer concludes with a projection of to support full F P R O M as we1 ASIC (Applicatil Electrically the requirements of E2 technoloaies 1 on a1 f unction, commodity memoTies as low cost microcontrollers and Specific Integrated Circuits). t

Address output FIGURE 7-Oscillograph of memory access time. FIGURE 6-Photograph of 5V-only 16K E2PROM.

I n t e l C o r p o r a t i o n 3 6 0 1 J u l i e t t e Lane Santa Clara, Ca. 95051 (408) 496-7294 I n t h e F l o t o x ( f l o a t i n g -g a t e t u n n e l o x i d e ) EEPROM t e c h n o l o g y , ( 2 ) a n u l t r a t h i n t h e r m a l o x i d e (around 110 i) h a s b e e n u s e d a s t h e F~w l e r -N o r d h e i m (~) t u n n e l p a t h . B o t h erase and write a r e accomp l i s h e d by t u n n e l i n g t h e e l e c t r o n b e t w e e n t h e f l o a t i n g p o l y s i l i c o n g a t e a n d N d r a i n r e g i o n . The i n t e g r i t y o f t h e t u n n e l o x i d e becomes i n a d e q~a t e '~) f o r a d i e l e c t r i c t h i c k n e s s b e l o w 8 0 w h i c h i s a n e s s e n t i a l r e q u i r e m e n t f o r a 12 V e r a s e / w r i t e EEPROM. High temperature ammonia-annealed oxide h a s b e e n s u g g e s t e d ( 7 ) a s a n a l t e r n a t i v e t u n n e l d i e l e c t r i c b e c a u s e t h e n i t r i d i z e d o x i d e h a s a h i g h breakdown c a p a b i l i t y a n d l o w e r t u n n e l b a r r i e r . U n f o r t u n a t e l y , t h i s n i t r i d i z e d o x i d e e x h i b i t s h y t e r s i s i n s t a b i l i t y d u e t o n i t r i d a t i o n -i n d u c e d t r a p s .+ ( 5 ) ( 6 ) ( 8 ) I n o r d e r t o l o w e r t h e programming voltage and improve the endurance of EEPROM, o x i d i z e d -n i t r i d i z e d o x i d e (ONO) (') has been developed and demonstrated in 16 kb EEPROM. E v a l u a t i o n t e c h n i q u e s ( l O ) a r e based on ( i ) l o g I -V a t c o n s t a n t ramp r a t e t o d e t e r m i n e t h e t r a p b e h a v i o r v s . c u r r e n t s t r e s s . ( i i ) C-V t o d e t e r m i n e t h e s u r f a c e s t a t e b e h a v i o r a n d d i f f e r e n t i a t e i t f r o m t r a p p i n g . ( i i i ) V ( t ) a c r o s s t h e t h i n d i e l e c t r i c f o r a c o n s t a n t s t r e s s t o d e t e r m i n e t h e t o t a lamount of charge trapped b e f o r e d i e l e c t r i c b r e a k d o w n . ( i v ) J . t u n d e r c o n s t a n t c u r r e n t stress t o d e t e r m i n e t h e t o t a l c h a r g e p a s s e d t h r o u g h d i e l e c t r i c p e r u n i t a r e a b e f o r e d i e l e c t r i c b r e a k d o w n . Charge trapping was c o r r e l a t e d w i t h n i t r i d a t i o n t e m p e r a t u r e / t i m e , o x i d a t i o n t e m p e r a t u r e / t i m e and J ' t y i e l d . It will be shown t h a t t h e t h r e s h o l d window, d e f i n e d a s t h e d i f f e r e n c e b e t w e e n t h e e r a s e and write t h r e s h o l d , r e m a i n s a l m o s t c o n s t a n t u n t i l 1 0 e r a s e / w r i t e c y c l e s owing t o t h e e x t r e m e l y l o w c h a r g e t r a p p i n g i n ON0 f i l m s u n d e r h i g h -f i e l d stress. 65 ON0 f i l m s show s i g n if i c a n t l y b e t t e r J -t y i e l d t h a n o x i d e o r n i t r i d i z e d o x i d e , t h e ON0 f i l m a p p e a r s v e r y p r o m i s s i n g a s a t u n n e l d i e l e c t r i c i n t h e I2 V e r a s e / w r i t e EE...