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In order to flexibly control the voltage-clamping capability of silicon controlled rectifiers (SCRs), this paper proposes a photoelectric gate-controlled SCR (PGCSCR). Equivalent circuits and technology computer aided design (TCAD) simulations are used to analyze how the device works. The device has been validated by a standard 0.18 µm Bipolar CMOS DMOS (BCD) process. The ES620-50 Transmission Line Pulse (TLP) test system was used to verify the impact of the photoelectric effect on the electro-static discharge (ESD) characteristics of the device. The test result shows that the clamping voltage at the holding point of the PGCSCR under the light-free condition is 4.308 V. When the optical power is 5 W/µm2 and the 450 nm wavelength spot is irradiated on the surface of the device, the clamping voltage at the holding point of the PGCSCR is reduced to 3.655 V. And by changing the wavelength of the incident light spot (600 nm), the clamping voltage (3.409 V) of the device changes. Finally, based on the avalanche multiplication effect and the photoelectric effect, the change in the clamping voltage of the device can be further explained. PGCSCR can flexibly adjust the clamping voltage of the device according to the ESD window requirements of the target chip without changing the structure and size, and is expected to be applied in the fields of integrated optical circuits, opto-coupling, and optical communication.

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