2010 Proceedings of ESSCIRC 2010
DOI: 10.1109/esscirc.2010.5619716
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0.5-V, 150-MHz, bulk-CMOS SRAM with suspended bit-line read scheme

Abstract: A low-voltage high-speed bulk-CMOS SRAM that operates over 100MHz at 0.5V, for the first time, is proposed. A novel 8-transistor (8T) memory cell with a complementary read port (C-RP) improves the read speed by enabling differential bit-line sensing, while the conventional 8T SRAM drives the bit line with a single read port (S-RP). The cell layout of the C-RP SRAM has point symmetry and a small area overhead (1.4x) compared with the conventional 6T SRAM cell, without any additional layers. The read delay and t… Show more

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Cited by 14 publications
(7 citation statements)
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“…The researchers demonstrated different types of 9T SRAM cells with the various read and write port to improve the performance and operate the memory cell in reliable condition under process variations . The proposed cell is implemented with the CNTFET‐based 9T SRAM using shared BL selection with row and column select circuits to enhance the performance.…”
Section: The 9t Sram Topology Design and Requirementsmentioning
confidence: 99%
“…The researchers demonstrated different types of 9T SRAM cells with the various read and write port to improve the performance and operate the memory cell in reliable condition under process variations . The proposed cell is implemented with the CNTFET‐based 9T SRAM using shared BL selection with row and column select circuits to enhance the performance.…”
Section: The 9t Sram Topology Design and Requirementsmentioning
confidence: 99%
“…Zigzag (Z) 8T SRAM Cell (Wu et al 2010) (Suzuki et al 2010) Figure 2.22 shows a decoupled differential Z8T SRAM cell. It reduces the area overhead associated with CP10T cell and also achieves a better WM.…”
Section: Differential Read Decoupled 8t and 10t Sram Cellsmentioning
confidence: 99%
“…Dual port 8T cells have been proposed to free the SNM/WNM tradeoff with its dedicated read port, which enables lower-voltage operation than 6T SRAMs [4]. The 8T cells, however, have a half-select problem, which is a disturbance to unselected cells in a write cycle [5] as illustrated in Fig. 1.…”
Section: Introductionmentioning
confidence: 99%