450 MHz PowerPC/sup TM/ microprocessor with enhanced instruction set and copper interconnect

Álvarez, José Marcos Alonso; Barkin, E.; Chao, Chai-Chin; Johnson, Bill; D'Addeo, M.; Lassandro, F.; Nicoletta, G.; Patel, Parth; Reed, Paul; Reid, Dan; Sanchez, H.; Siegel, Jason B.; Sullivan, S.; Taylor, Scott A.; Vo, Minh

doi:10.1109/isscc.1999.759141

Cited by 15 publications

(3 citation statements)

References 2 publications

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“…We also adjusted the delays of the cache latency, focusing on three and ten for the MRAM latency. Also is assumed as our reference that the SRAM has one cycle delay [52][53][54][55][56][57].…”

Section: Case Study: Cjpegmentioning

confidence: 99%

High Performance SoC Design Using Magnetic Logic and Memory

Zhao

Torres

Cargnini

et al. 2012

VLSI-SoC: Advanced Research for Systems on Chip

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Abstract.As the technolody node shrinks down to 90nm and below, high standby power becomes one of the major critical issues for CMOS highspeed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies, such as FRAM, MRAM, PCRAM and RRAM, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy integration on top of CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and discuss their potential applications in the future from both physical and architectural points of view.

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Section: Case Study: Cjpegmentioning

confidence: 99%

High Performance SoC Design Using Magnetic Logic and Memory

Zhao

Torres

Cargnini

et al. 2012

VLSI-SoC: Advanced Research for Systems on Chip

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“…It is the first implementation of Motorola's Altivec technology [8]. A Die Photo of the microprocessor is shown in Figure 1.…”

Section: The Mpc7400 Microprocessormentioning

confidence: 99%

“…It uses a 1.8V power supply. Further details of the design and technology of the MPC7400 microprocessor can be found in [8].…”

Section: The Mpc7400 Microprocessormentioning

confidence: 99%

At-speed testing of delay faults for Motorola's MPC7400, a PowerPC/sup TM/ microprocessor

Tendolkar

Molyneaux²,

Pyron³

et al.

Proceedings 18th IEEE VLSI Test Symposium

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In this paper we present the novel built-in delay fault test concepts incorporated intoMotorola's MPC7400 PowerPC microprocessor that allow us to use a slow speed tester to do at-speed, scan based, delay fault testing. A novel feature of the design is the programmable clock control circuit for issuing a given number of at-speed clocks for the delay test, once the test is initiated. Using transition and path delay fault test patterns, we have tested several MPC7400 chips at speed exceeding 540 MHz using tester speed of 63 MHz or lower.

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