A 0.127 μm² High Performance 65nm SOI Based embedded DRAM for on-Processor Applications

Abstract

We present a 65nm embedded DRAM cell (0.127 µm 2 cell size) on unpatterned SOI fabricated using standard high performance SOI technology with dual stress liner (DSL) (1). The cell utilizes a low-leakage 2.2-nm gate oxide pass transistor and a deep trench capacitor. A trench side wall spacer process enables a simplified collarless process. Connection to the buried plate is realized by silicided substrate guardrings with fully landed tungsten contacts. The bitline structure and the deep trench capacitor are designed for high transfer ratio and low RC constant which ensure high performance and sufficient sensing signal. The pass transistor is strain engineered to boost on current and employs optimized S/D junctions to help attain sub-pA off current. This technology has produced fully-functional 2Mb prototype embedded macros with sub-1.5ns latency and sub-2ns random cycle times for on-processor caches. The low leakage device developed also enables for the first time a low standby power SOI technology.

Accumulator-based self-adjusting output data compression for embedded word-organized DRAMs

“…Growing integration densities have made it feasible to also implement embedded Dynamic RAM (e-DRAM) cores [1]- [3]. The configuration of a wordorganized embedded DRAM is illustrated in Figure 1.…”

Testing Methodology of Embedded DRAMs

“…With the continually growing need to an effective and economic embedded-memory core in the SoC era, researchers attempt to carry DRAM's advantages from a commodity memory into a SoC. In the past decade, a lot research effort has been put into the embedded-DRAM (eDRAM) technologies, such as deep-trench capacitor with bottle etch [2], planar capacitor [3], [4], shallow trench capacitor [4], and metal-insulator-metal (MIM) capacitor [3], [5], to reduce the process adders to the CMOS process, where the eDRAM is embedded in. The eDRAM technologies are now available in the IC-foundry industry [6], [7] and its applications include the products of networking, multimedia handheld devices, gaming consoles, high definition television, and so forth.…”

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

“…Supply generation for embedded DRAM (eDRAM) in server class applications entails special challenges due to the stringent power, frequency, cell retention, variability, and distribution requirements [1,2]. Switched capacitor charge pumps have been traditionally used [3] in DRAM applications.…”