A high performance differential amplifier through the direct monolithic integration of InP HBTs and Si CMOS on silicon substrates

Kazior, T.E.; LaRoche, J. R.; Lubyshev, D.; Fastenau, J. M.; Liu, W. K.; Urteaga, M.; Ha, Wonill; Bergman, J.; Choe, Minhyeok; Bulsara, Mayank T.; Fitzgerald, Eugene A.; Smith, D. A.; Clark, D. T.; Thompson, R.; Drazek, Charlotte; Daval, N.; Benaissa, L.; Augendre, E.

doi:10.1109/mwsym.2009.5165896

Cited by 36 publications

(27 citation statements)

References 5 publications

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“…Differential amplifiers step and repeated across a 100mm diameter SOLES wafer showed very good yield and uniformity highlighting the manufacturability of our approach. Details on the differential amplifier have been previously reported [7,8]. Figure 6.…”

Section: Resultsmentioning

confidence: 99%

High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate

Kazior¹,

Laroche²,

Urteaga³

et al. 2010

2010 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)

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In this work we present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).

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Section: Resultsmentioning

confidence: 99%

High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate

Kazior¹,

Laroche²,

Urteaga³

et al. 2010

2010 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)

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“…One approach, pursued by a team led by Northrop Grumman Aerospace Systems, involves sub-circuit integration in which III-V device "chiplets" are assembled onto a processed CMOS wafer with high-density [9]. At the other end of the spectrum, in an approach being developed by a Raytheon-led team [10], monolithic integration methods are being explored to epitaxially grow III-Vs on CMOScompatible substrates. An intermediate approach is being studied by a team led by HRL Laboratories [11].…”

Section: Program Objectives and Challengesmentioning

confidence: 99%

“…As previously mentioned, three innovative heterogeneous integration processes are currently being developed in COSMOS program: micrometer scale assembly [9], monolithic epitaxial growth [10], and epitaxial layer printing [11] approaches as illustrated in Fig. 1 A micrometer-scale assembly process is being developed by the team led by Northrop Grumman Aerospace Systems.…”

Section: Program Achievementsmentioning

confidence: 99%

The DARPA COSMOS program: The convergence of InP and Silicon CMOS technologies for high-performance mixed-signal

Raman

Chang

Dohrman

et al. 2010

2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)

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The COmpound Semiconductor Materials On Silicon (COSMOS) program of the U.S. Defense Advanced Research Projects Agency (DARPA) focuses on developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices with high-density silicon circuits. The technical approaches being explored in this program include high-density micro assembly, monolithic epitaxial growth, and epitaxial layer printing processes. In Phase I of the program, performers successfully demonstrated world-record differential amplifiers through heterogeneous integration of InP HBTs with commercially fabricated CMOS circuits. In the current Phase II, complex wideband, large dynamic range, high-speed digitalto-analog convertors (DACs) are under development based on the above heterogeneous integration approaches. These DAC designs will utilize InP HBTs in the critical high-speed, high-voltage swing circuit blocks and will employ sophisticated in situ digital correction techniques enabled by CMOS transistors. This paper will also discuss the Phase III program plan as well as future directions for heterogeneous integration technology that will benefit mixed signal circuit applications.

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“…Innovative integration architectures with shorter interconnects and system repartitioning will facilitate 3D are epitaxially grown adjacent to CMOS transistors on silicon wafers. Wafer-integrated multilayer interconnects are used to demonstrate circuits using CMOS and InP HBTs [12]. In another effort, monolithic integration of inverter circuits in silicon is demonstrated with GaN-based devices.…”

Section: Introductionmentioning

confidence: 99%

3D integration technologies for emerging microsystems

Choudhury

2010

2010 IEEE MTT-S International Microwave Symposium

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The next generation of small form factor (SFF) microsystem technologies can only keep up with increased functionality and performance demands by using the third dimension. 3D integration technologies can be grouped into following distinct technology approaches: (i) 3D-monolithic IC integration, (ii) 3D stacking of IC-dies, wafers and packages, and (iii) 3D integrated packaging. This paper provides an overview on the various 3D integration and enabling technologies as well as the associated challenges that exist for SFF wireless system implementation with optimum cost and performance.

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A high performance differential amplifier through the direct monolithic integration of InP HBTs and Si CMOS on silicon substrates

Cited by 36 publications

References 5 publications

High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate

High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate

The DARPA COSMOS program: The convergence of InP and Silicon CMOS technologies for high-performance mixed-signal

3D integration technologies for emerging microsystems

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