A Novel Fluorine Incorporated Band Engineered (BE) Tunnel (SiO2/ HfSiO/ SiO2) TANOS with Excellent Program/Erase & Endurance to 10^5 Cycles

Abstract

We demonstrate for the first time a fluorine incorporated bandengineered (BE) tunnel oxide (SiO 2 /HfSiO/SiO 2 ) TANOS with excellent program / erase (P/E) characteristics and endurance to 10 5 cycles. Incorporating fluorine in the tunnel dielectric improves Si/SiO 2 interface resulting in excellent endurance of nearly constant over 3V P/E window for at least 10 5 cycles. Fluorine also reduces interface state generation during retention by ~20%. Furthermore, Fluorine passivates bulk traps leading to as much as ~10x higher charge to breakdown (Q bd ) and ~10-50x lower interface state density (Dit). Fluorine passivation for BE-TANOS is significant because it improves reliability assisting implementation of TANOS flash NVM beyond the 20nm node.

Fluorination of Al2O3 blocking layer for improving the performance of metal‐oxide‐nitride‐oxide‐silicon flash memory

“…As shown in Fig. 1(b), the AlO sample without fluorine plasma treatment displays an Al 2p peak at 74.2 eV [10], indicating Al-O bond formation, while the Al 2p peak of the AlOF sample with fluorine plasma treatment was deconvoluted into two peaks, one located at 74.2 eV due to the Al-O bond, another one located at 75.8 eV due to the formation of Al-F bond. Moreover, it is observed that the peak intensity of the Al-O bonds is reduced after incorporation of fluorine, meaning that Al-F bonds replace some Al-O bonds.…”

“…To obtain a similar P/E memory window for both devices, shorter pulse time and smaller voltage is required for the AlOF sample, meaning that less stress is applied on the thin tunneling layer and the endurance characteristic is enhanced [14]. Moreover, during the PDA at 900 °C, some incorporated fluorine atoms diffuse in the bulk of the MONOS capacitor to reach the interface between the Si substrate and SiO 2 forming strong Si-F bonds, which can improve the interface quality, thus also leading to better endurance characteristic [10]. Figure 4 displays the retention properties of both samples tested at room temperature and the energy-band diagram of the AlOF sample under retention mode.…”

“…On the other hand, it is reported that fluorine treatment can improve the electrical properties and oxide reliability of high-k dielectric materials by reducing their defects [8,9]. To obtain ideal tunnel layer with SiO 2 /HfO 2 / SiO 2 dielectric stack, fluorine incorporation by fluorine ion implantation at different stages of processing has been fully researched [10]. Recently, fluorination of Al 2 O 3 blocking layer for silicon-oxide-nitride-silicon devices has been investigated by treating Al 2 O 3 with a low-energy fluorine (neutral or ion) beam [11,12].…”

Barrier engineering in metal–aluminum oxide–nitride–oxide–silicon (MANOS) flash memory: Invited

“…To improve tunnel oxide reliability, a fluorine incorporation technique was reported [44][45][46]. Incorporating fluorine in the tunnel dielectric improves the Si/SiO 2 interface, resulting in excellent endurance over a 3 V P/E window for at least 1E + 05 cycles because the fluorine passivates defects in the tunnel oxide stack.…”

Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering

“…[3][4][5][6][7]10) In addition, it also suffers from poor retention due to the charge-trapped around the triangular corners. To compensate both the programming time and data retention of GAA-FG, in this work, the tunnel barrier engineering concept of variable oxide thickness (VARIOT) [11][12][13][14][15][16] as tunnel layer is utilized. It has been previously studied for charge-trapping 15,16) and even for hybrid floating [17][18][19] gate devices and its performances as tunnel oxide layer for 3D FG cell is yet to be unveiled.…”