A straightforward design technique for narrowband multi‐stage low‐noise amplifiers with I/O conjugate match

Abstract

Low‐noise amplifier (LNA) designers often struggle to simultaneously satisfy gain, noise, stability, and I/O matching requirements. In this article, a novel design technique, tailored for two‐stage low‐noise amplifiers, is presented. The proposed design method is completely deterministic and exploits inductive source degeneration to obtain a two‐stage LNA featuring perfect input and output match together with low noise figure (NF) and a pre‐determined gain, including stability analysis. A novel flowchart is provided together with the corresponding design chart that contains gain, matching, and stability information, therefore addressing all key figures‐of‐merit of a linear amplifier. The design chart is easily implementable in commercial Electronic Design Automation software, to aid designers in the difficult task of selecting the appropriate source degeneration inductor value. The noise performance, on the other hand, is the best possible since the matching networks are designed to provide the input of the two Field Effect Transistors with the optimum termination for noise. The design method is validated with two separate test vehicles operating respectively at Ka‐band (26.5‐31.5 GHz) and K‐band (20.0‐24.0 GHz). The realized Monolithic Microwave Integrated Circuits exhibit 18 dB gain for both versions, NF of 1.5 and 1.2 dB, respectively for the Ka‐band and K‐band version. Input and output matching are typically better than 12 and 15 dB.

Design and Validation of 100 nm GaN-On-Si Ka-Band LNA Based on Custom Noise and Small Signal Models

“…As a design choice, the optimum noise measure termination was shown to the input section of all devices, in order to minimize the NF of the cascade. More specifically, a deterministic design approach, namely, the "constant mismatch circles" method, was adopted for first and second stage preliminary design [17]. Conceiving a mismatch at the interstage sections, and imposing the optimum noise measure load at the input section of all devices, by tuning the source-inductor values, we can obtain a satisfying level of input and output matching while still ensuring the lowest achievable noise of the whole amplifier.…”

PVT ‐compensated low‐voltage and low‐power CMOS LNA for IoT applications

“…The considered g m boosting structure is inverter based on increasing the g m level to g mn + g mp . 16,17 The forward body bias technique is used to reduce the required supply voltage for proper circuit performance, and thus decrease power consumption. By applying the adequate voltage to transistor body terminal, it is possible to control V th and inject the current suitable with a low supply voltage into the circuit.…”

Design ofGaN‐basedX‐band LNAsto achieve sub‐1.2 dBnoise figure

“…Various efforts have been made to improve and address the performance parameters of GaN-based LNAs, including linearity, robustness, recovery time, and NF. 2 Although sub-1.5 dB NF has been reported 4,17,18,19,20 for K-and Kabands, GaAs comparative NF at X-band for GaN technology remained a challenge. Ya gbasan and Aktu g 21 reported 1.6 dB NF using 0.25 μm GaN-on-SiC technology for 8-11 GHz.…”