A Study on aggressive proximity of embedded SiGe with comprehensive SDE engineering for 32 nm-node high-performance pMOSFET technology

Abstract

We have presented the high performance pMOSFET with embedded SiGe (eSiGe) technique which is applicable to 32 nm node ground rule (dense gate space) [1]. In general, close eSiGe S/D structure to the channel improves pMOSFET performance because of higher strain in the channel. However, we found the relation between boron diffusion modulation in SiGe region and short channel effect (SCE) in the context of eSiGe proximity change. Therefore, additional source drain extension (SDE) optimization is required to improve device performance with close eSiGe structure focusing on parasitic resistance reduction. As a results, we have demonstrated high drive current of 755 µA/µm at V dd = 1.0 V, I OFF = 100 nA/µm, 30 nm gate length pMOSFET.

eSiGe Global and Micro Loading Effect Study in High Performance 45nm CMOS Technology

“…The second benefit of eSiGe is it can reduce source/drain electrical resistance and favor an abrupt junction formation. SiGe can incorporate more dopant than Si, furthermore boron diffusion in SiGe is retarded and comparatively lower than that of Si (5). However, with device size further scaling down to 45nm and beyond, process integration challenges have imposed more stringent requirements on SiGe epi process.…”