Achieving a SiGe HBT epitaxial emitter with novel low thermal budget technique

Brabant, Paul; Wen, Jianqing; Italiano, Joe; Landin, Trevan; Cody, N. W.; Haen, Lee

doi:10.1016/j.apsusc.2003.08.105

Cited by 4 publications

(2 citation statements)

References 3 publications

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“…H 2 baking at 800 • C for 30 min had an oxygen-free interface (below SIMS detection limit: 3 × 10 11 cm −2 ). However, H 2 baking at 750 • C had no ability to remove interfacial oxygen in this experiment, although it was reported to be effective in a smaller size batch furnace [4] and in a single wafer CVD system [5]. Si-based gas and Si-Cl-based gas alone at low temperature were not effective enough to lower the interfacial oxygen level below 1 × 10 13 cm −2 .…”

Section: Resultsmentioning

confidence: 76%

Low-temperature pre-treatments in a vertical epitaxial reactor with an improved vacuum load-lock chamber

Wang¹,

Inokuchi²,

Kunii³

2006

Semicond. Sci. Technol.

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Low-temperature (<750 • C) surface preparation for epitaxial growth poses extra challenges for both hardware of a vertical batch epitaxial reactor and chemistry of in situ pre-epi treatments. The vacuum load-lock chamber of the vertical batch tool has been improved to ensure that residual moisture and oxygen concentrations are suppressed to less than 0.1 ppm. Si-based and Cl-based gases or a mixture of these gases are investigated in terms of effectiveness to remove interfacial residual oxygen at low temperatures (<750 • C). Under an optimized process condition, we found that interfacial oxygen can be reduced to less than 1 × 10 12 cm −2 levels by low-temperature treatment with a mixture of Si-based and Cl-based gases.

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Section: Resultsmentioning

confidence: 76%

Low-temperature pre-treatments in a vertical epitaxial reactor with an improved vacuum load-lock chamber

Wang¹,

Inokuchi²,

Kunii³

2006

Semicond. Sci. Technol.

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“…H 2 baking at 800 o C for 30 min had an oxygen free interface (below SIMS detection limit: 3E11 cm -2 ). However, H 2 baking at 750 o C had no ability to remove interface oxygen in this experiment, although it was reported to be effective in a smaller size batch-type furnace (7) and in single-wafer CVD system (8).…”

Section: Low-temperature (< 750°c) Surface Pre-treatmentmentioning

confidence: 96%

Development of High-Throughput Batch-Type Epitaxial Reactor

et al. 2006

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Si/SiGe selective epitaxial growth is becoming a critical process step for ULSI fabrication on 65nm and beyond technologies with need for elevated source-drain or strained Si channel to enhance device performance. This paper reviews recent efforts to improve batch-type epitaxial reactors for high-volume device fabrication and shows recent progress in low-temperature Si/SiGe selective epi process.

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