An experimental chip to evaluate test techniques experiment results

Abstract

This paper describes the testing of a chip especially designed to facilitate the evaluation of various test techniques for combinational circuitry. The different test sets and test conditions are described. Several tables show the results of voltage tests applied, either at rated speed or 2/3 speed, to each defective CUT. Data for Crosscheck, Very-Low-Voltage, IDDQ and delay tests are also given.

Quantitative analysis of very-low-voltage testing

“…The results in [2] showed that there were some test escapes for a very-low-voltage test but these dies were detected by a current test. On the other hand, the results in [2] also showed that there were some suspect dies that were only detected by VLV testing. This implies that VLV testing and I DDQ testing do not target exactly the same defects.…”

“…The supply voltage used in [2] for VLV testing is in the range proposed in this paper. In [2], the supply voltage was selected by doing a Shmoo plot on a good die. 1.7V was then chosen considering both noises and test time.…”

“…1.7V was then chosen considering both noises and test time. The results published in [2] indicated that there were some dies that failed only VLV testing.…”

“…Based on the difference of the electrical characteristics at different supply voltages, VLV testing can detect some defects that are undetectable at the normal supply voltage. The experimental results in [2] indicated that VLV testing detected some suspect dies that passed normal voltage tests and current tests. Not only can this technique be used for CMOS digital circuits, but Bruls also applied it to test a class AB amplifier developed in a 1.0µm double metal CMOS technology and a bipolar ring oscillator manufactured in a BiCMOS process [3].…”

Experimental results for IDDQ and VLV testing

“…The design of the experiment and architecture of the test chip were described in ITC'95 [2]. Preliminary results based on only one clocking mode were also reported in ITC'95 [3]. In ITC'96, we reported the results on timing-dependent defects and also the defect population in each defect class [4].…”