An ILP Approach to the Simultaneous Application of Operation Scheduling and Power Management

Abstract

At the behavioral level, large power saving is possible by shutting down unused operations, which is commonly referred to as power management. However, on the other hand, operation scheduling has a significant impact on the potential for power saving via power management. In this paper, we present an integer linear programming (ILP) model for the simultaneous application of operation scheduling and power management in high level synthesis. Our objective is to maximize the power saving under both the timing constraints and the resource constraints. Compared with previous work, experimental data consistently show that our approach has significant improvement in the power saving.

A formal approach to slack-driven high-level synthesis

“…We use eight popular high-level synthesis benchmark circuits to test the effectiveness of our ILP approach. Benchmark circuits HAL [5], AR [6], BF [7], and FIR [8] are DSP applications, while benchmark circuits G2, G5, JIAN, and IDCT1 are adopted from [9]. In small circuits, the CPU times of our ILP approach are in seconds; however, in the largest circuit IDCT1, the CPU time of our ILP approach is within one hour.…”

3D IC design partitioning for temperature rise minimization

“…Benchmark circuits Jian, IDCT2, G2 and G5 are adopted from [5], while circuits HAL and BF are adopted from [6]. These six benchmark circuits are targeted to TSMC 0.18 μm process technology.…”