“…The resistor-capacitor (RC) time constant in the power-rail ESD clamp circuit: on the one hand, it determined the magnitude of the biased gate voltage of M big , that is to control who dominates the current discharge process of the internal parasitic BJT transistor and the channel, thus affecting the robustness of M big . To bias the gate voltage of the M big , many circuits present ways to employ a resistor pair [3][4][5]; on the other hand, the RC time constant determines the response time of the M big , during the ESD event, it is necessary to ensure that the M big is turned on, but the RC time constant is too large, easy to cause mis-trigger and occupy a large area, so to avoid using excessive RC time constant, feedback delay techniques [6][7][8], multiple RC triggering [9,10], capacitive couple mechanism [11,12], hybrid triggered power clamp circuit [13,14], and current mirror structure amplifying capacitor [15,16] were proposed to provide solutions for power-rail ESD clamp circuit that reduce the RC time constant and prolong the response time of M big .…”