Bias Temperature Instabilities for Low-Temperature Polycrystalline Silicon Complementary Thin-Film Transistors

Abstract

The degradation mechanisms of both negative bias temperature instability ͑NBTI͒ and positive bias temperature instability ͑PBTI͒ were studied for low-temperature polycrystalline silicon complementary thin-film transistors. Measurements show that both NBTI and PBTI are highly bias dependent; however, the effect of the temperature is only functional on the NBTI stress. Furthermore, instead of interfacial trap-state generation during the NBTI stress, the PBTI stress passivates the interface trap states. We conclude that the diffusion-controlled electrochemical reactions dominate the NBTI degradation while charge trapping in the gate dielectric controls the PBTI degradation.

Device reliability under electrical stress and photo response of oxide TFTs

“…For those of every TFT, including a-Si, 24 low-temperature polysilicon (LTPS), 25 and organic TFTs, 26 the quality of the gate insulator is of particular importance in order to obtain high stability because the charge trapping at the interface or the injection into the gate insulator induces the V th shift under the gate-bias stress. Especially, we have to consider the hydrogen content in the gate insulator because the characteristics of oxide semiconductors in TFTs could be variable by the degree of hydrogen incorporation from the gate insulator to the active layer during the ensuing process.…”

Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor

“…Applying −10 V to the Pt-gate shows a strong inversion of hole carriers at the interface between ZTO and LTPS. These inversion carriers strongly influence the interface state, trap state generation and fixed charge formation originating from the depassivation of the weak Si-H bonds located at the interface of the grain boundaries555657. The increase in the number of interfacial traps and the increased depolarization field, which are generated by the broken hydrogen atoms, might be the main source of SS degradation.…”

Defect generation in non-nitrided and nitrided sputtered gate oxides under post-irradiation Fowler–Nordheim constant current stress

“…Using MOS structures gives also an opportunity for a fast evaluation of near border traps in deposited oxide, defects that are largely overlooked in studies of stability of TFTs. Creation of grain boundary traps are documented in electrically stressed TFTs [8,9] and it is anticipated that they should be also generated if TFTs were exposed to irradiation.…”