Coulomb blockade in quasimetallic silicon-on-insulator nanowires

Tilke, A.; Blick, Robert H.; Lorenz, H.; Kotthaus, J. P.; Wharam, D.

doi:10.1063/1.125435

Cited by 61 publications

(41 citation statements)

References 11 publications

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“…In the case of highly doped SOI nanowire, [1][2][3][4] Coulomb blockade oscillation is attributed to the formation of randomly distributed Coulomb islands separated by tunnel junctions formed by dopant fluctuations, and its dependence on the gate voltage is quite complicated. On the other hand, SETTs based on the undoped SOI nanowire ͑i.e., weakly p doped͒ 5,6 show relatively controllable characteristics originated from the device geometry due to the exclusion of a dopant fluctuation effect.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire

Kim¹,

Sung²,

Kim³

et al. 2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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For the purpose of controllable characteristics, silicon single-electron tunneling transistors with an electrically formed Coulomb island are proposed and fabricated on the basis of the sidewall process technique. The fabricated devices are based on a silicon-on-insulator ͑SOI͒ metal-oxidesemiconductor ͑MOS͒ field effect transistor with the depletion gate. The key fabrication technique consists of two sidewall process techniques. One is the patterning of a uniform SOI nanowire, and the other is the formation of n-doped polysilicon sidewall depletion gates. While the width of a Coulomb island is determined by the width of a SOI nanowire, its length is defined by the separation between two sidewall depletion gates which are formed by a conventional lithographic process combined with the second sidewall process. These sidewall techniques combine the conventional lithography and process technology, and guarantee the compatibility with complementary MOS process technology. Moreover, critical dimension depends not on the lithographical limit but on the controllability of chemical vapor deposition and reactive-ion etching. Very uniform weakly p-doped SOI nanowire defined by the sidewall technique effectively suppresses unintentional tunnel junctions formed by the fluctuation of the geometry or dopant in SOI nanowire, and the Coulomb island size dependence of the device characteristics confirms the good controllability. A voltage gain larger than one and the controllability of Coulomb oscillation peak position are also successfully demonstrated, which are essential conditions for the integration of a single-electron tunneling transistor circuit. Further miniaturization and optimization of the proposed device will make room temperature designable single-electron tunneling transistors possible in the foreseeable future.

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Section: Introductionmentioning

confidence: 99%

Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire

Kim¹,

Sung²,

Kim³

et al. 2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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“…Researchers took advantage of natural disorder to create such extremely small islands, mostly with constrictions in disordered thin films 10,11,12,13,14 . More recently 15 undulated thin films have been used, as well as pattern-dependent oxidation 16 .We followed another approach based on etched silicon nanowires without constrictions, as pionnered by Tilke et al 17 and more recently Namatsu et al 18 , and also Kim et al 19 and Fujiwara et al 20 . In the two first cases the formation of a Coulomb island in a nanowire underneath a very large gate was studied.…”

mentioning

confidence: 99%

“…We followed another approach based on etched silicon nanowires without constrictions, as pionnered by Tilke et al 17 and more recently Namatsu et al 18 , and also Kim et al 19 and Fujiwara et al 20 . In the two first cases the formation of a Coulomb island in a nanowire underneath a very large gate was studied.…”

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confidence: 99%

Simple and controlled single electron transistor based on doping modulation in silicon nanowires

Hofheinz

Jehl

Sanquer

et al. 2006

Applied Physics Letters

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A simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires. The structure is a metal-oxide-semiconductor field-effect transistor made on silicon-on-insulator thin films. The channel of the transistor is the Coulomb island at low temperature. Two silicon nitride spacers deposited on each side of the gate create a modulation of doping along the nanowire that creates tunnel barriers. Such barriers are fixed and controlled, like in metallic SETs. The period of the Coulomb oscillations is set by the gate capacitance of the transistor and therefore controlled by lithography. The source and drain capacitances have also been characterized. This design could be used to build more complex SET devices.The first and most common Coulomb blockade device is the Single Electron Transistor (SET) made with metallic leads and island, and tunnel oxide barriers 1,2 . It is used as sensitive electrometers 3 or electron pumps allowing to control the transfer of electrons one by one 4,5 . Since then very important efforts have been devoted to fabricate silicon SETs, mostly to integrate SETs together with regular transistors for building logic circuits 6,7 , and more recently for quantum logic experiments with single charge or spin in silicon quantum dots 8,9 . An important challenge is to increase the temperature of operation from the typical sub-kelvin range of original devices up to much higher temperatures. The required size of the island is of the order of the nm, and therefore out of control of current fabrication processes. Researchers took advantage of natural disorder to create such extremely small islands, mostly with constrictions in disordered thin films 10,11,12,13,14 . More recently 15 undulated thin films have been used, as well as pattern-dependent oxidation 16 .We followed another approach based on etched silicon nanowires without constrictions, as pionnered by Tilke et al. 17 and more recently Namatsu et al. 18 , and also Kim et al. 19 and Fujiwara et al. 20 . In the two first cases the formation of a Coulomb island in a nanowire underneath a very large gate was studied. In the two others two gates were defined above a nanowire, each of them acting as a tunable barrier for entering/exiting the single electron box delimited by these gates. Although this scheme allowed logic operations to be performed at 300K 15,16 , it remains a complex architecture since up to 4 gates are needed for proper operation. Our SET is much simpler since it requires a single gate to define the quantum dot, while the barriers are fixed, like in metallic SETs. Periodic Coulomb blockade is observed, with a period solely determined by the surface area of a single gate. It is therefore controlled by lithography, not by disorder. With current state of the art electron beam lithography the limit in operating temperature is of the order of 10 K. The schematics of our device is essentially similar to the original metallic SETs, the tunnel oxide barriers being re-

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“…We combine the well-established SOI-technology with the fabrication of quasi-metallic narrow Si-wires by an extremely high doping of our SOI-films [2]. In many cases these act as metallic single-electron transistors (SETs) and offer many similar charging states and hence a broad range of operating points.…”

Section: Quasi-metallic Coulomb Blockade Oscillationsmentioning

confidence: 99%

“…We realize both highly doped nanowires [2] to study Coulomb blockade (CB) in the classical metallic regime as well as quantum dots defined in inversion layers of metal-oxide field effect transistors (MOSFETs) [3] to observe non-periodic CB oscillations strongly affected by spatial quantization. Underetching of these nanostructures in the SOI-system allows to realize suspended single electron transistors (SuSETs) [4] and, by metallization of these suspended beams, also a novel kind of nanomechanical resonators [5].…”

Section: Introductionmentioning

confidence: 99%