Crosstalk analysis of CMOS buffer driven interconnects for ultra-low power applications

Dhiman, Rohit; Chandel, Rajeevan

doi:10.1007/s10825-013-0541-0

Cited by 6 publications

(2 citation statements)

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“…Different procedures, to be specific decision feedback equalization, linear equalization, pre-emphasis, deemphasis, and adaptive equalization, have been accounted for equalization techniques in interconnects. [8][9][10][11][12] It can be an inductive, capacitive, or radiative coupling of lines. 5 The coupled on-chip interconnects face thermal noise due to resistive heating, 6 which limits the current density and causes the breakdown.…”

Section: Introductionmentioning

confidence: 99%

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Modeling of CMS‐based nonuniform interconnects using FDTD technique

Kolanti¹,

Sulochana

Vobulapuram³

et al. 2018

Circuit Theory & Apps

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This paper presents the finite-difference time-domain model of nonuniform interconnects including skin effect losses based on the current mode signaling (CMS). For accurate analysis, the nonlinear CMOS inverter is used as a driver for coupled nonuniform interconnects. These effects are incorporated in the proposed model using the modified alpha power law model. Additionally, high-frequency losses are incorporated in the proposed model that further improves the accuracy. Using the proposed model, the performance of nonuniform interconnects is investigated using the CMS scheme. Timedomain analysis model is derived from CMS nonuniform interconnects using finite-difference time-domain technique. Both inductive and capacitive couplings have been considered to incorporate coupling effects in interconnects. The efficiency of CMS interconnects is evaluated by comparing with conventional voltage mode signaling interconnects. The propagation delays and dynamic and functional cross talk effects at the far end of the coupled nonuniform interconnect are analyzed at the 32-nm technology node. The proposed model results are validated using the standard HSPICE simulations. KEYWORDS CMS, cross talk and propagation delay, FDTD, nonuniform interconnects, skin effects | INTRODUCTIONThe sustained technology scaling in very-large-scale integration leads to high complexity in integrated circuits. Due to scaling of technology, interconnect delays are more dominant than the gate delays. Billions of transistors are fabricated in a single chip causing high density and reduction in dimensions of the on-chip components. 1 As the global interconnects have increased lengths, delay due to parasitic components like resistor (R), capacitor (C), inductance (L), and conductance (G) are more that dominates other scaled device delays. The major source of delay and power dissipation is interconnects in miniaturized devices. These interconnects are not always uniform; they are mostly nonuniform in nature due to their complexity and particular design specifications at corners and edges of interconnect.The demand for the high-speed devices increases with the scaling of the technology; as a result, the frequency dispersion losses and noise takes place with high operating frequencies. 2,3 Due to the intersymbol interference problem in the received signal, the bit error rate increases eventually. Equalization techniques are used to diminish this nonideal effect. Different procedures, to be specific decision feedback equalization, linear equalization, pre-emphasis, deemphasis, and adaptive equalization, have been accounted for equalization techniques in interconnects. 4 The noise in

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Section: Introductionmentioning

confidence: 99%

“…7 Coupling causes other important noise in interconnects, which is popularly known as cross talk noise. [8][9][10][11][12] It can be an inductive, capacitive, or radiative coupling of lines. This affects the functionality, signal integrity, and consistency of the system.…”

Section: Introductionmentioning

confidence: 99%