DC-DC converters: From discrete towards fully integrated CMOS

Steyaert, Michiel; Breussegem, Tom Van; Meyvaert, Hans; Callemeyn, Piet; Wens, Mike

doi:10.1109/essderc.2011.6044234

Cited by 37 publications

(21 citation statements)

References 26 publications

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“…Both output waveforms have a DC-offset of 0.6V . From equation (1) follows that the load voltage V load can either be positive or negative. There is no DC offset voltage in V load which allows to eliminate an external capacitor to filter off this offset.…”

Section: B Combination Towards Full-bridgementioning

confidence: 99%

“…On-chip power conversion techniques are used more and more since they enable a reduced bill of materials and increase the flexibility for the system design. Recent research results have shown the feasibility of fully-integrated DC-DC converters in standard CMOS technologies [1]. A following gap to bridge is the integration of DC-AC conversion.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A stacked full-bridge topology for high voltage DC-AC conversion in standard CMOS technology

Callemeyn

Steyaert

2013

2013 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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Section: B Combination Towards Full-bridgementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A stacked full-bridge topology for high voltage DC-AC conversion in standard CMOS technology

Callemeyn

Steyaert

2013

2013 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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“…Also, transistor miniaturization may allow the integration of voltage regulator modules on the die. This integration step is expected to induce more supply voltage ripple than from off-die regulators [4].…”

Section: Heterogeneousmentioning

confidence: 99%

Variation tolerant self-adaptive clock generation architecture based on a ring oscillator

Pérez-Puigdemont

Calomarde

Moll

2012

2012 IEEE International SOC Conference

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Abstract-In this work we propose a self-adaptive clock based on a ring oscillator as the solution for the increasing uncertainty in the critical path delay. This increase in uncertainty forces to add more safety margins to the clock period which produces a circuit performance downgrade. We evaluate three self-adaptive clock systems: free running ring oscillator, infinite impulse response filter controlled RO and TEAtime controlled ring oscillator. The safety margin reduction of the three alternatives is investigated under different clock distribution delay conditions, dynamic variation frequencies and the presence of mismatch between the ring oscillator and the critical paths and the delay sensors.

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“…Afterwards, switched-capacitor converters have been investigated for memory applications on IC (Integrated Circuit) in 1970s [3]. Research on state-of-the-art switched-capacitor DC-DC converters has focused on low voltage and/or high power applications, majority of which are implemented on ICs [4]- [6]. For switchedcapacitor power converters that have voltage and power levels above 12 V and 2 W, discrete power converters are commonly implemented by academia [8], [9] and industry [10].…”

Section: Introductionmentioning

confidence: 99%

A 380 V High Efficiency and High Power Density Switched-Capacitor Power Converter using Wide Band Gap Semiconductors

Fan¹,

Knott²,

Jørgensen³

2024

RE&PQJ

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State-of-the-art switched-capacitor DC-DC power converters mainly focus on low voltage and/or high power applications. However, at high voltage and low power levels, new designs are anticipated to emerge and a power converter that has both high efficiency and high power density is highly desirable. This paper presents such a high voltage low power switched-capacitor DC-DC converter with an input voltage up to 380 V (compatible with rectified European mains) and an output power experimentally validated up to 21.3 W. The wide band gap semiconductor devices of GaN switches and SiC diodes are combined to compose the proposed power stage. Their switching and loss characteristics are analyzed with transient waveforms and thermal images. Different isolated driving circuits are compared and a compact isolated halfbridge driving circuit is proposed. The full-load efficiencies of 98.3% and 97.6% are achieved for the power stage and the complete power converter, without heatsink or airflow. The corresponding power densities are 7.9 W/cm 3 and 2.7 W/cm 3 , based on boxed volumes, respectively.

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DC-DC converters: From discrete towards fully integrated CMOS

Cited by 37 publications

References 26 publications

A stacked full-bridge topology for high voltage DC-AC conversion in standard CMOS technology

A stacked full-bridge topology for high voltage DC-AC conversion in standard CMOS technology

Variation tolerant self-adaptive clock generation architecture based on a ring oscillator

A 380 V High Efficiency and High Power Density Switched-Capacitor Power Converter using Wide Band Gap Semiconductors

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