2011
DOI: 10.1021/nl201362n
|View full text |Cite
|
Sign up to set email alerts
|

Direct Formation of Wafer Scale Graphene Thin Layers on Insulating Substrates by Chemical Vapor Deposition

Abstract: Direct formation of high-quality and wafer scale graphene thin layers on insulating gate dielectrics such as SiO(2) is emergent for graphene electronics using Si-wafer compatible fabrication. Here, we report that in a chemical vapor deposition process the carbon species dissociated on Cu surfaces not only result in graphene layers on top of the catalytic Cu thin films but also diffuse through Cu grain boundaries to the interface between Cu and underlying dielectrics. Optimization of the process parameters lead… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

7
241
0
1

Year Published

2013
2013
2018
2018

Publication Types

Select...
5
3

Relationship

0
8

Authors

Journals

citations
Cited by 309 publications
(249 citation statements)
references
References 37 publications
7
241
0
1
Order By: Relevance
“…This is because of the hole doping of graphene from the SiO 2 substrate due to the naturally strong interaction tendencies between graphene and SiO 2 . This strong doping of graphene directly grown on SiO 2 is consistent with the results stated in our previous report [10] and those reported by another group [7]. Forward and reverse I ds -V gs curves are shown in Fig.…”
supporting
confidence: 92%
See 2 more Smart Citations
“…This is because of the hole doping of graphene from the SiO 2 substrate due to the naturally strong interaction tendencies between graphene and SiO 2 . This strong doping of graphene directly grown on SiO 2 is consistent with the results stated in our previous report [10] and those reported by another group [7]. Forward and reverse I ds -V gs curves are shown in Fig.…”
supporting
confidence: 92%
“…Based four-point probe measurements, sheet resistance of the fabricated graphene was found to be about 170 -200 Ω/sq (Fig. 3 (b)), a value much lower than that of graphene directly grown on SiO 2 substrate by thermal CVD (∼2000 Ω/sq) [7][8][9]. It was revealed that the hexagonal domain graphene with relatively large domain size (> 10 µm) was directly grown on the SiO 2 substrate by our method [10].…”
mentioning
confidence: 87%
See 1 more Smart Citation
“…CVD‐grown graphene has made great breakthrough in the growth of large‐area graphene 17, 155, 156, 157, 158, 159, 160. Recently, the synthesis of 2DLMs via CVD methods has been illustrated in many reports especially for MoS 2 ,30, 31, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185 which also shows promising applications in electronics and optoelectronics.…”
Section: Preparation Methods and Characterizationsmentioning
confidence: 99%
“…Electrical parameters were not measured in either of the two, cited works. A very interesting transfer-free method was used in [9]. The basic structure was Cu (300 nm)/SiO 2 / Si.…”
Section: Resultsmentioning
confidence: 99%