DRCPlus in a router: automatic elimination of lithography hotspots using 2D pattern detection and correction

Abstract

As technology processes continue to shrink, standard design rule checking (DRC) has become insufficient to guarantee design manufacturability. DRCPlus is a powerful technique for capturing yield detractors related to complex 2D situations 1,2 . DRCPlus is a pattern-based 2D design rule check beyond traditional width and space DRC that can identify problematic 2D configurations which are difficult to manufacture. This paper describes a new approach for applying DRCPlus in a router, enabling an automated approach to detecting and fixing known lithography hotspots using an integrated fast 2D pattern matching engine. A simple pass/no-pass criterion associated with each pattern offers designers guidance on how to fix these problematic patterns. Since it does not rely on compute intensive simulations, DRCPlus can be applied on fairly large design blocks and enforced in conjunction with standard DRC in the early stages of the design flow. By embedding this capability into the router, 2D yield detractors can be identified and fixed by designers in a push-button manner without losing design connectivity. More robust designs can be achieved and the impact on parasitics can be easily assessed. This paper will describe a flow using a fast 2D pattern matching engine integrated into the router in order to enforce DRCPlus rules. An integrated approach allows for rapid identification of hotspot patterns and, more importantly, allows for rapid fixing and verification of these hotspots by a tool that understands design intent and constraints. The overall flow is illustrated in Figure 1. An inexact search pattern is passed to the integrated pattern matcher. The match locations are filtered by the router through application of a DRC constraint (typically a recommended rule). Matches that fail this constraint are automatically fixed by the router, with the modified regions incrementally re-checked to ensure no additional DRCPlus violations are introduced. Figure 1. Overall flow using a fast 2D pattern matching engine to enforce DRCPlus rules *ylai@cadence.com; phone 1 408 914-6701 Design for Manufacturability through Design-Process Integration IV, edited by Michael L. Rieger, Joerg Thiele, Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/21/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx rn I DtC DRC PSS I p I, +I Ofl4CcnsflMt McIS &gmrakin > VMJJCThe basis of this flow is the existence of a library of patterns that the router will check for in a given technology node. This paper will further illustrate a methodology for determining and using this library of patterns. A deck of patternbased rules can be easily defined, used, and modified as needed.Experimental results from this flow run on a routed block will be demonstrated.

Machine learning and pattern matching in physical design

“…In [34] [35], design rule checker is integrated with the routing engine at the post-routing stage to identify and correct hotspots. However, fixing hotspots at the post-routing stage has limited flexibility as only limited rip-up Fig.…”

Lithography hotspot detection and mitigation in nanometer VLSI

“…Lithography hotspot mitigation can be performed at the post-routing stage, e.g., [24]. In [26] [27], design rule checker is integrated with the routing engine at the postrouting stage to identify and correct hotspots. First, a set of problematic pattern topologies are transformed into DRC rules.…”

A pattern-driven design regularization methodology

“…4,5 In-design use has its own set of requirements for tight integration, speed, accuracy, and ease-of-use. The productivity for designers can be improved when rules described as patterns can be used for guidance and/or checking while constructing the design.…”