2012
DOI: 10.1143/jjap.51.04dd16
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Effect of Oxidation Amount on Gradual Switching Behavior in Reset Transition of Al/TiO2-Based Resistive Switching Memory and Its Mechanism for Multilevel Cell Operation

Abstract: To analyze and explain the gradual reset switching property of the bipolar switching resistive random access memory (RRAM) for multilevel cell (MLC) operation, the effect of the amount of plasma oxidation on the gradual reset switching behavior of the Al/TiO2-based RRAM cell structure is investigated. The device that undergoes plasma oxidation in a shorter time has a better ON/OFF current (I ON/I OFF) ratio and shows increased ON current (I ON). The device … Show more

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Cited by 4 publications
(3 citation statements)
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“…While there was consistent switching and low cycle-to-cycle variability, it was more important to observe the presence of gradual switching characteristics in the RESET state, thus confirming the existence of multilevel states in the HRS. 34,35 In the investigation of multiple device characteristics, the device-to-device variability of the resistive switching devices with an average SET voltage of 0.5 V and V stop at −1.2 V was also shown in a resistance box plot in Figure 2b, read at −0.1 V. It was found that the median ON/ OFF ratio was about 50×, a ratio large enough for multiple level resistance switching states to occur. Endurance studies were also performed at SET/RESET pulse heights of 0.6 V/−1.3 V at 100 ns pulse widths as shown in the flow chart of Figure 3a.…”
Section: ■ Experimental Methodsmentioning
confidence: 98%
“…While there was consistent switching and low cycle-to-cycle variability, it was more important to observe the presence of gradual switching characteristics in the RESET state, thus confirming the existence of multilevel states in the HRS. 34,35 In the investigation of multiple device characteristics, the device-to-device variability of the resistive switching devices with an average SET voltage of 0.5 V and V stop at −1.2 V was also shown in a resistance box plot in Figure 2b, read at −0.1 V. It was found that the median ON/ OFF ratio was about 50×, a ratio large enough for multiple level resistance switching states to occur. Endurance studies were also performed at SET/RESET pulse heights of 0.6 V/−1.3 V at 100 ns pulse widths as shown in the flow chart of Figure 3a.…”
Section: ■ Experimental Methodsmentioning
confidence: 98%
“…As seen in this figure, the reset process can be divided into two regions describing abrupt and gradual reset behaviors: Region I and Region II. We expect that Region I corresponds to the ON-state provided by a metallic filament, while Region II is likely associated with a gradual dissolution process of the residual filaments after the rupture of the main filament path 27 28 . The reset voltage-dependent behaviors of a typical switching element are discussed in Figure S1 (Supporting Information) , identifying the presence of relevant multileveled I–V responses that depend on the reset voltages.…”
Section: Resultsmentioning
confidence: 99%
“…[1][2][3] Multilevel storage effect was observed in both two-terminal resistive switching devices [4][5][6] and three-terminal transistors. [7][8][9] In resistive switching devices, multilevel storage effect is due to the electrically induced ion migration in dielectric layers.…”
mentioning
confidence: 99%