Electrical conductivity of silicon-on-insulator structures prepared by bonding silicon wafers to a substrate using hydrogen implantation

Antonova, I. V.; Stas, V.F.; Popov, V.; Obodnikov, V.I.; Гутаковский, А. К.

doi:10.1134/1.1309421

Cited by 9 publications

(7 citation statements)

References 6 publications

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“…The effective n-type behavior is caused by a gating with the surface charge, although the details of the bending and charge transfer mechanism are not well understood [31,36]. It has been suggested that the surface states created by the HFdip pin the Fermi energy level ∼0.2-0.3 eV below the conduction band minimum [31].…”

mentioning

confidence: 99%

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

et al. 2010

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Abstract:Integrated freestanding single-crystal silicon nanowires with typical dimension of 100 nm × 100 nm × 5 μm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. The fabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. The measured electrical transport characteristics of the silicon nanowires covered with/without SiO2 support a model of Fermi level pinning near the conduction band. The I-V curves of the nanowires reveal a current carrier polarity reversal depending on Si-SiO2 and Si-H bonds on the nanowire surfaces.

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mentioning

confidence: 99%

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

et al. 2010

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“…42 In that study, it was found that time duration of the exfoliation process affects the final conductivity type. This result was puzzling and not expected.…”

Section: Conductivity In the Transferred Layersmentioning

confidence: 93%

Strain and electrical characterization of metal-oxide-semiconductor field-effect transistor fabricated on mechanically and thermally transferred silicon on insulator films

Bickford

Novotny

et al. 2004

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Articles you may be interested inCharacterization of current injection mechanism in Schottky-barrier metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 95, 083502 (2009); Electrical effects of a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect transistors Nitrided thermal SiO 2 for use as top and bottom gate insulators in self-aligned double gate silicon-on-insulator metal-oxide-semiconductor field effect transistor Unique method to electrically characterize a single stacking fault in silicon-on-insulator metal-oxide-semiconductor field-effect transistors Silicon-on-insulator (SOI) substrates were created from two methods of ion cutting: thermal exfoliation (TE) and mechanical exfoliation (ME). These SOI films are characterized to discern the differences in electrical and other properties induced by the ME and TE processes. p-metal-oxide-semiconductor field-effect transistor were fabricated on these SOI substrates as well as on bulk silicon and their I-V characteristics measured and compared to point out materials differences created by the two methods. X-ray diffraction measurements were also performed to supplement the exploration of the TE and ME material properties. Overall the FETs fabricated from the ME SOI outperformed those made from the TE SOI and had similar I on / I off ratios and off-state drain-source leakage currents to the FETs fabricated from bulk Si.

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“…It has been previously reported that hydrogen implantation converts p-type silicon doping to n-type and that annealing above 600-700°C is required to restore initial p-type doping (14)(15). Solid phase epitaxial re-growth (SPER) processing in silicon after amorphization by ion implantation has been largely investigated (16).…”

Section: Smart Cut Tm and Solid Phase Epitaxial Regrowth Electrical mentioning

confidence: 99%

(Invited) Low Temperature Direct Bonding 3D Stacking Technologies for High Density Device Integration

et al. 2013

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Electrical conductivity of silicon-on-insulator structures prepared by bonding silicon wafers to a substrate using hydrogen implantation

Cited by 9 publications

References 6 publications

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

Strain and electrical characterization of metal-oxide-semiconductor field-effect transistor fabricated on mechanically and thermally transferred silicon on insulator films

(Invited) Low Temperature Direct Bonding 3D Stacking Technologies for High Density Device Integration

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