Elimination of stress induced silicon defects in very high density SRAM structures

Ferreira, P.; Bianchi, R.A.; Guyader, F.; Pantel, R.; Granger, E.

doi:10.1109/essderc.2001.195292

Cited by 11 publications

(1 citation statement)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…[24,25] We note that both high-resolution electron microscopy [high-angle annular dark field (HAADF)] and analytical electron microscopy [electron energy loss spectroscopy (EELS)] did not show a higher doping concentration on individual defects as a consequence of pipe diffusion or segregation described by other authors. [26][27][28][29] Furthermore, MOSFETs with dislocations are characterized by a lower ratio of on-state to off-state current (I ON /I OFF ) compared with reference devices without dislocations. This is mainly caused by higher values of I OFF (Figure 4).…”

Section: Short Summary Of Experimental Resultsmentioning

confidence: 99%

Transport of Charge Carriers along Dislocations in Si and Ge

Kittler

Reiche

Schwartz

et al. 2019

Physica Status Solidi (a)

View full text Add to dashboard Cite

Experimental observations and quantum mechanical device simulations point to different electronic properties of dislocations in silicon and germanium. The experimental data suggest a supermetallic behavior of the dislocations in Si and thus the high strain in the dislocation core is thought to cause the confinement of the charge carriers, which leads to the formation of a 1D electron gas along a dislocation (quantum wire). The resulting significant increase in the electron concentration corresponds to a marked increase in the drain current of metal–oxide–semiconductor field‐effect transistor (MOSFET). The specific resistance of an individual dislocation in Ge is about nine orders of magnitude higher than for a dislocation in Si. The experimental measurements of the strain in dislocation cores in Ge are still missing. Based on the band structure data, the generation of a strain equivalent to that of the dislocation cores in Si appears to be very challenging because of the transition from an indirect into a direct semiconductor with about tenfold lower strain levels. The lower strain in the dislocation core in germanium may not support the carrier confinement as proposed for the dislocation core of silicon, and consequently 1D electron gases are not expected to form along the dislocations in Ge.

show abstract

Section: Short Summary Of Experimental Resultsmentioning

confidence: 99%

Transport of Charge Carriers along Dislocations in Si and Ge

Kittler

Reiche

Schwartz

et al. 2019

Physica Status Solidi (a)

View full text Add to dashboard Cite

show abstract

Ultrathin DPN STI SiON liner for 40nm low-power CMOS technology

Chen

et al. 2010

Solid-State Electronics

View full text Add to dashboard Cite

Early detection of crystal defects in the device process flow by electron beam inspection

Moreau

Mantovani

Mica

et al.

The 17th Annual SEMI/IEEE ASMC 2006 Conference

View full text Add to dashboard Cite

In this paper, we describe an inline method to reveal crystal defects in the device fabrication process by voltage contrast detection with an electron beam inspection tool. Suitably designed monitor structures are used to this purpose. The correspondence between bright voltage contrast defects and dislocations connecting the transistor source and drain is demonstrated by selective etching followed by SEM review and by TEM inspection. In addition, it is shown that the voltage contrast defects correlate with the leakage current of the dislocation monitor structures, though some electrically active defects are missed by the electron beam inspection. Possible approaches to improve the capture rate of dislocations and correlation to leakage current are discussed. Finally, the correlation between e beam inspection of dislocation monitor structures and parametric test on a 65nm DR wafer is demonstrated.

show abstract

Elimination of stress induced silicon defects in very high density SRAM structures

Cited by 11 publications

References 5 publications

Transport of Charge Carriers along Dislocations in Si and Ge

Transport of Charge Carriers along Dislocations in Si and Ge

Ultrathin DPN STI SiON liner for 40nm low-power CMOS technology

Early detection of crystal defects in the device process flow by electron beam inspection

Contact Info

Product

Resources

About