Forward Bias Gate Breakdown Mechanism in Enhancement-Mode p-GaN Gate AlGaN/GaN High-Electron Mobility Transistors

Abstract

In this work, we studied the forward bias gate breakdown mechanism on Enhancement-mode p-GaN gate AlGaN/GaN HEMTs. To the best of our knowledge, it is the first time that the temperature dependency of the forward gate breakdown has been characterized. We report for the first time on the observation of a positive temperature dependency, i. e., a higher temperature leads to a higher gate breakdown voltage. Such unexpected behavior is explained by avalanche breakdown mechanism: at a high positive gate bias, electron/hole pairs are generated in the depletion region at the Schottky metal/p-GaN junction. Furthermore, at a high gate bias but before the catastrophic gate breakdown, a light emission was detected by a emission microscopy measurement (EMMI). This effect indicates an avalanche luminescence, which is mainly due to the recombination of the generated electron/hole pairs. Index Terms-p-GaN, AlGaN/GaN HEMTs, Forward bias gate breakdown, avalanche breakdown.

Effects of Annealing Treatments on the Properties of Al/Ti/p-GaN Interfaces for Normally OFF p-GaN HEMTs

“…In fact, as recently pointed out in [42], under a positive gate bias, the accumulation of holes at the p-GaN/AlGaN interface is accompanied by the emission of 2DEG electrons over the AlGaN barrier that are driven through the p-GaN layer toward the gate electrode. Obviously, a higher metal/p-GaN Schottky barrier will result into a wider p-GaN depletion region and, hence, into a lower gate current.…”

Technology and Reliability of Normally-Off GaN HEMTs with p-Type Gate

“…This manifests itself in an on-state gate current of about 10 µA/mm (Figure 4b) which might be challenging for gate driving. A replacement of the p-type ohmic contact on top of p-GaN gate layer by a p-type Schottky contact using tungsten [25] or TiN [27] as gate metal can significantly reduce the on-state gate current of the transistor. The introduced Schottky-diode is in reverse polarity with respect to the semiconductor-junction pin-diode.…”

“…In the case of HEMTs with p-GaN gate, the situation is different: the stress bias is positive, and most of the potential falls on the p-GaN layer. The situation can be complicated by the fact that in several cases the metal/p-GaN contact is a Schottky junction that is reversely biased when the gate voltage is positive [27]. This may lead to the partial depletion of the p-GaN layer in proximity of the surface.…”

“…Recent papers suggested that a second process can contribute to the breakdown of the gate junction, namely avalanche multiplication. Wu et al [27] proposed that at high positive gate bias, electrons can be injected from the channel to the p-GaN region, where a high field is present. The electrons are therefore accelerated by the high field (see Figure 11), and avalanche processes may lead to device breakdown.…”

TCAD simulation of MIS-gated power GaN transistors

“…There known two different concepts to produce normallyoff GaN devices: Schottky and Ohmic p-gate devices. Panasonic [15] - [16] and FBH [17] - [19] are used the Ohmic contact to p-GaN layer, but Samsung [20] and IMEC [21] are used the W and TiN based Schottky gate contacts. A detailed investigation of the impact of gate metal on the performance of p-GaN/AlGaN/GaN transistors was presented in [22].…”