High Response Piezoelectric and Piezoresistive Materials for Fast, Low Voltage Switching: Simulation and Theory of Transduction Physics at the Nanometer‐Scale
Abstract:Field effect transistors are reaching the limits imposed by the scaling of materials and the electrostatic gating physics underlying the device. In this Communication, a new type of switch based on different physics, which combines known piezoelectric and piezoresistive materials, is described and is shown by theory and simulation to achieve gigahertz digital switching at low voltage (0.1 V).
“…It should be noted that the density of the films estimated from the deposition amount and the film thickness shown in Fig. 1(a) is about 4.5 g/cm 3 , a value almost identical to that of (K 0.86 Na 0.14 )NbO 3 .…”
{001} c -oriented (K 0.86 Na 0.14 )NbO 3 thick films were prepared at 240°C on (100) c SrRuO 3 //(100)SrTiO 3 substrates by repeated hydrothermal deposition technique. The film thickness was found to increase linearly with the number of deposition cycles, and 60¯m-thick film was obtained after nine repetitions of the deposition. The K/(K+Na) ratio of the deposited thick films, measured by X-ray fluorescence spectroscopy, showed constant values regardless of the number of deposition cycles. Cross-sectional scanning electron microscopy images revealed uniformity of the obtained dense films with no obvious micro cracks and pores. Structural characterization based on X-ray diffraction, XRD 2ª-½ patterns and X-ray pole figure measurement, showed that the epitaxial relationship between the films and substrates with a {001} c orientation was maintained throughout the deposition cycles. In addition, cross-sectional Raman spectra showed that 60¯m-thick (K 0.86 Na 0.14 )NbO 3 film had an orthorhombic structure. The dielectric constant, ¾ r , and tan ¤ showed frequency dependence. The average remanent polarization measured at 100 Hz was 8¯C/cm 2 .
“…It should be noted that the density of the films estimated from the deposition amount and the film thickness shown in Fig. 1(a) is about 4.5 g/cm 3 , a value almost identical to that of (K 0.86 Na 0.14 )NbO 3 .…”
{001} c -oriented (K 0.86 Na 0.14 )NbO 3 thick films were prepared at 240°C on (100) c SrRuO 3 //(100)SrTiO 3 substrates by repeated hydrothermal deposition technique. The film thickness was found to increase linearly with the number of deposition cycles, and 60¯m-thick film was obtained after nine repetitions of the deposition. The K/(K+Na) ratio of the deposited thick films, measured by X-ray fluorescence spectroscopy, showed constant values regardless of the number of deposition cycles. Cross-sectional scanning electron microscopy images revealed uniformity of the obtained dense films with no obvious micro cracks and pores. Structural characterization based on X-ray diffraction, XRD 2ª-½ patterns and X-ray pole figure measurement, showed that the epitaxial relationship between the films and substrates with a {001} c orientation was maintained throughout the deposition cycles. In addition, cross-sectional Raman spectra showed that 60¯m-thick (K 0.86 Na 0.14 )NbO 3 film had an orthorhombic structure. The dielectric constant, ¾ r , and tan ¤ showed frequency dependence. The average remanent polarization measured at 100 Hz was 8¯C/cm 2 .
“…Speed is controlled by matching the RC time ( ) and sound crossing time (PE height / PE speed of sound) which can easily reach picoseconds. These results together with FEM simulations show that a VLSI-scale PET device can attain a resistive On/Off ratio of 10 4 at gate voltages of order 0.1 V, while operating at 10 GHz [6,7,16] -provided near bulk properties of the materials SmSe and PMN-PT can be achieved at small scales as suggested by recent advances in materials scaling [14,15]. Early device prototypes are described in Refs.…”
Section: Mainmentioning
confidence: 83%
“…Recently, we have invented a new technology, the PiezoElectronic Transistor (PET), shown in its 4-terminal form in Fig. 1, modeled its performance in the VLSI space as a fast, low power 3terminal device [6][7][8], and fabricated several prototypes demonstrating proof of principle [9,10]. The PET is potentially both low power and fast because of its stress transduction operating principle: A voltage signal arrives, charging a piezoelectric (PE) capacitor [11,12], which expands, compressing a piezoresistive (PR) channel material [13,14] against a rigid surrounding yoke/frame, transducing the input signal into internal stress.…”
The piezoelectronic transduction switch is a novel device with high potential as a post-CMOS transistor due to its predicted multi-GHz, low voltage performance on the VLSI-scale. However, the operating principle of the switch has much wider applicability. We use theory and simulation to optimize the device across a wide range of length scales and application spaces and to understand the physics underlying its behavior. We show that the four-terminal VLSI-scale switch can operate at a line voltage of 115 mV while as a low voltage-large area device, ≈200 mV operation at clocks speeds of ≈2 GHz can be achieved with a desirable 10 4 On/Off ratio-ideal for on-board computing in sensors. At yet larger scales, the device is predicted to operate as a fast (≈250 ps) RF switch exhibiting high cyclability, low On resistance and low Off capacitance, resulting in a robust switch with a RF figure of merit of ≈4 fs. These performance benchmarks cannot be approached with CMOS which has reached fundamental limits. A combination of finite element modeling and ab initio calculations enables prediction of switching voltages for a given design. A multivariate search method then establishes a set of physics-based design rules, discovering the key factors for each application. The results demonstrate that the piezoelectronic transduction switch can offer fast, low power applications spanning several domains of the information technology infrastructure.
“…Regarding a possible application of the prepared structures as piezoresistive material in piezoelectric field‐effect transistors (PE‐FETs), the high change in electrical conductivity which can be obtained at comparably low strain (expressed by the high GF ) is a promising feature of the SC‐PC‐SC structures. The piezoelectric materials in PE‐FETs are preferentially operated at low strain and stress values to avoid degradation effects . One way to achieve this is to optimize the height ratio between the piezoelectric and piezoresistive materials.…”
Section: Resultsmentioning
confidence: 99%
“…Newns et al proposed a new FET device consisting of a piezoelectric and a piezoresistive material. The new electronic fast switch based on novel materials should surmount the constraints on power per unit area of metal‐oxide semiconductor field‐effect transistors (COMS‐FET) which limit the further increase in the clock speed of computers .…”
Electrostatic potential barriers at doped ZnO-ZnO interfaces can be modified by stress-induced polarization charges. This concept was enhanced by preparing ZnO-based single crystal-polycrystal-single crystal structures by diffusion bonding. Increasing time for epitaxial solid-state transformation results in structures with a decreasing thickness of residual polycrystalline material in between two well-oriented single crystals. Microstructural and electrical analysis quantifies the influence of high-temperature treatment during epitaxial growth on the stress sensitivity of the prepared structures. The orientation of the single crystals is defined to maximize the interaction between stress-induced polarization charges and the potential barriers at doped ZnO-ZnO interfaces. With decreasing thickness of residual polycrystalline material, the percentage of grain boundaries with favorably aligned polarization vectors is increased resulting in a higher stress sensitivity. This effect is compensated by an adverse effect of the high-temperature treatment on the initial potential barrier height. Hence, a maximum in stress sensitivity can be observed for intermediate times of epitaxial growth. The prepared structures close the gap between the varistor piezotronics based on bulk ceramics with random orientation of the polarization vector and the bicrystal piezotronics with perfect orientation of the polarization vector, demonstrating the capability of microstructural engineering for varistor-based piezotronic devices.
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