Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications

Tsunoda, Kouji; Sato, Akira; Tashiro, Hiroko; Nakanishi, Takafumi; Tanaka, Hitoshi

doi:10.1093/ietele/e88-c.4.608

Cited by 3 publications

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“…The way to make the time as short as 0.1 ns is to reduce T ox to 0.5 nm. According to an extrapolation from the experimental data of electron tunneling injection/ejection, 12 the time becomes as short as 0.1 ns when T ox is reduced to 0.5 nm. Though it looks very difficult to realize such a thin T ox , it will be possible utilizing techniques such an atomic layer deposition ͑ALD͒.…”

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confidence: 99%

Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation

Nakajima

Kudo

Ito

2011

Applied Physics Letters

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Articles you may be interested inCharacteristics of metal-oxide-semiconductor field-effect transistors with a functional gate using trap charging for ultralow power operation Shallow trench isolation stress modification by optimal shallow trench isolation process for sub-65-nm low power complementary metal oxide semiconductor technology J. Vac. Sci. Technol. B 28, 391 (2010); 10.1116/1.3359612 Characterization of current injection mechanism in Schottky-barrier metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 95, 083502 (2009); 10.1063/1.3204439Scaling considerations for high performance 25 nm metal-oxide-semiconductor field effect transistors Low-voltage operation from the tower structure metal-oxide-semiconductor field-effect transistor Si field emitter J.

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mentioning

confidence: 99%

Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation

Nakajima

Kudo

Ito

2011

Applied Physics Letters

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Charging and Discharging Characteristics of a Quantum Well with an Initially Lorentzian Wave Packet Incident on a DTM Type Potential

Kubo

Yamada

2016

Communications in Computer and Information Science

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Characteristics of metal–oxide–semiconductor field-effect transistors with a functional gate using trap charging for ultralow power operation

Kudo

Ito

Nakajima

2013

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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Articles you may be interested inFunctional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation Appl. Phys. Lett. 98, 053501 (2011); 10.1063/1.3549178 Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxidesemiconductor field-effect transistor Appl. Phys. Lett. 92, 063506 (2008); 10.1063/1.2839402Scaling considerations for high performance 25 nm metal-oxide-semiconductor field effect transistors Hot-carrier effects on radio frequency noise characteristics of LDD n-type metal-oxide-semiconductor field effect transistors J.Low-voltage operation from the tower structure metal-oxide-semiconductor field-effect transistor Si field emitter A functional gate metal-oxide-semiconductor field-effect transistor that enables self-adjustment of threshold voltage (V th ) was developed for the ultralow power operation. The operating principle enables the on-current to be increased without increasing the off-current. Prototype devices were fabricated with complementary metal-oxide-semiconductor (CMOS) fabrication technology using a silicon-on-insulator substrate, and the fundamental device characteristics necessary for ultralow power operation were demonstrated with an emphasis on the device reliability. A negative V th shift was caused by electron ejection from the poly-Si charge trap layer, and a positive V th shift was caused by electron injection from the top gate electrode. A fabricated device endured 10 5 electron ejection-and-injection cycles when only a positive bias V g was applied. Endurance characteristics of the fabricated devices showed that the number of cycles to oxide breakdown increased as the channel size decreased. The authors explained the SiO 2 breakdown mechanism by using a percolation model. They consider that scaling down of the channel size and the thickness of the tunnel gate oxide will open the way to the development of CMOS logic applications for this device.

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Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications

Cited by 3 publications

References 0 publications

Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation

Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation

Charging and Discharging Characteristics of a Quantum Well with an Initially Lorentzian Wave Packet Incident on a DTM Type Potential

Characteristics of metal–oxide–semiconductor field-effect transistors with a functional gate using trap charging for ultralow power operation

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