Improving the Efficiency of Scheduling and Placement in FPGA by Small-world Model Based Genetic Algorithm

Cui, Jie; Chen, Xue; Lei, Yongmei; Xu, Weimin

doi:10.1109/cit.2010.58

Cited by 3 publications

(3 citation statements)

References 19 publications

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“…With the rapid development of dynamical partial reconfiguration technology, FPGA (Field Programmable Gate Array) is able to allow independent tasks to be executed concurrently without interfering with each other, which increases its flexibility and performance, but on the other hand leads to multi-task scheduling problem [1,2].…”

Section: Introductionmentioning

confidence: 99%

“…The offline scheduling is in essence a combinatorial optimization problem of finding optimal or sub-optimal solutions from the combination of task placement and sequencing. Some classic combinatorial optimization algorithms such as genetic algorithm or simulated annealing are effective solutions [1]. The offline scheduling algorithms often use tree, linked list or matrix to represent the structures of the sequence and the placement.…”

Section: Introductionmentioning

confidence: 99%

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Towards Efficient Task Scheduling on 2D Reconfigurable FPGAs

Wang

Zhang

Xue

2013

AMR

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With the rapid development of dynamical partial reconfiguration technology, FPGA (Field Programmable Gate Array) is able to allow independent tasks to be executed concurrently without interfering with each other, which increases its flexibility and performance, but on the other hand leads to multi-task scheduling problem. The task scheduling in this paper is the problem of task sequencing, which adjusts the entering sequence of the incoming tasks with the consideration of the attributes of tasks and the utilization of FPGA. A conditional preemption based task sequencing method is proposed that allows tasks that arrive later to be executed in advance as long as the previous tasks can still be guaranteed to enter the FPGA on time. Simulations show that these methods can effectively decrease the waiting ratio of task sets, thus improving the flexibility and utilization of FPGA.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Towards Efficient Task Scheduling on 2D Reconfigurable FPGAs

Wang

Zhang

Xue

2013

AMR

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“…Current 2D FPGA allows independent tasks to run concurrently without interfering with each other, which makes it confront task placement problem [1]. Task placement consists of placement management and placement selection.…”

Section: Introductionmentioning

confidence: 99%

Towards Efficient Task Placement Selection on 2D Reconfigurable Devices

Wang¹,

Fang

Zhang³

et al. 2013

AMR

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Current 2D FPGA allows independent tasks to run concurrently without interfering with each other, which makes it confront task placement problem. Task placement consists of placement management and placement selection. Placement management manages all of the available locations on the FPGA while placement selection selects the proper location for each incoming task from the current available locations. Since we have proposed a Vertex-Scan (VS) algorithm for placement management that can efficiently find all free locations on the FPGA, this paper focuses on the problem of placement selection for tasks. A cost function based placement selection method is proposed that formalizes the influence of both time factor and space factor on the generation of fragmentation in FPGA. Simulations show that compared with the other methods, our method can achieve the lowest ratio of waiting tasks and waiting time. In addition, our methods advantages become more prominent especially in the circumstances of medium or smaller task sizes, and shorter time intervals.

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