Investigations of cooling solutions for three-dimensional (3D) chip stacks

Matsumoto, Keiji; Ibaraki, Soichiro; Sato, Masaaki; Sakuma, Katsuyuki; Orii, Yasumitsu; Yamada, Fumiaki

doi:10.1109/stherm.2010.5444319

Cited by 25 publications

(10 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Interlayer liquid cooling plays a major role in DTM of 3-D stacked MPSoCs [10], [23]. Applying variable flow rates changes the interlayer thermal resistance and creates the effect of having intermediate heat sinks in between tiers in 3-D architectures [6], [7] without performance degradation.…”

Section: Variable Fluid Flow Ratementioning

confidence: 99%

Energy-Efficient Multiobjective Thermal Control for Liquid-Cooled 3-D Stacked Architectures

Sabry

Coskun

Atienza

et al. 2011

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Section: Variable Fluid Flow Ratementioning

confidence: 99%

Energy-Efficient Multiobjective Thermal Control for Liquid-Cooled 3-D Stacked Architectures

Sabry

Coskun

Atienza

et al. 2011

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

“…In other words, all but chips is termed as the interconnection (24.7Pm thick), in accordance with Fig 7. This means that the interconnection includes SnAg with Cu post, Ni (2Pm thick), Al (2Pm thick), SiO 2 (dielectric) and SiN (passivation). We have already measured the thermal conductivity of SnAg with Cu post as 37 -41 W/mC in the previous work [15,16], and it is set as 39W/mC (average) in this simulation. The thermal conductivities of other materials in the simulation are shown in Table1.…”

Section: Resultsmentioning

confidence: 99%

“…Also, the thermal conductivity of the interconnection in the horizontal direction (in this study, it is set as 1.6W/mC) are to be investigated. [15,16] Thermal conductivity (W/mC) Material…”

Section: Discussionmentioning

confidence: 99%

“…In spite of this, there are very few experimental studies on the thermal resistance of the interconnections. Considering these, we measured the thermal conductivity of SnAg with Cu post to be 37-41 W/mC [15,16], in the previous works. Also, the thermal conductivity of C4 (Pb97Sn3) [17] and copper-tin (CuSn) interconnections [18] were measured previously.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack

Matsumoto

Ibaraki

Sueoka

et al. 2011

2011 27th Annual IEEE Semiconductor Thermal Measurement and Management Symposium

Self Cite

View full text Add to dashboard Cite

To propose an appropriate cooling solution for a threedimensional (3D) chip stack at the design phase, it is necessary to estimate the total thermal resistance of a 3D chip stack. The interconnection between stacked chips is considered as one of the thermal resistance bottleneck of a 3D chip stack, but it is not experimentally clear yet. We have previously measured the thermal conductivity of SnAg with Cu post to be 37-41W/mC by a steady state thermal resistance measurement method, using the sample which was simply composed of two Si chips and SnAg with Cu post between two Si chips. In this study, 3D stacked test chips are fabricated, which are implemented with PN junction diodes for temperature sensors and diffused resistors for heating, and the thermal conductivity of the interconnection in actual 3D stacked structure is experimentally obtained. The temperature distributions of two 3-layer-stacked-test-chips are measured and the equivalent thermal conductivity of the interconnection is experimentally obtained to be 1.6W/mC. This value is compared with the measured thermal conductivity of SnAg with Cu post (37-41W/mC) and its adequacy is examined.

show abstract

“…Interconnections are regarded as one of the thermal resistance bottlenecks of a 3D chip stack and we have measured the thermal conductivity of SnAg with Cu post to be 37-41 W/mC [4,5], in the previous works. Also, the thermal conductivity of C4 (Pb97Sn3) [6] and copper-tin (CuSn) interconnections [7] were measured previously.…”

Section: Introductiionmentioning

confidence: 99%

Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack, including the transient measurements

Matsumoto

Ibaraki

Sueoka

et al. 2012

2012 28th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)

Self Cite

View full text Add to dashboard Cite

show abstract

Investigations of cooling solutions for three-dimensional (3D) chip stacks

Cited by 25 publications

References 9 publications

Energy-Efficient Multiobjective Thermal Control for Liquid-Cooled 3-D Stacked Architectures

Energy-Efficient Multiobjective Thermal Control for Liquid-Cooled 3-D Stacked Architectures

Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack

Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack, including the transient measurements

Contact Info

Product

Resources

About