Muller C-elements based on minority-3 functions for ultra low voltage supplies

Berge, Hans Kristian Otnes; Hasanbegovic, Amir; Aunet, Snorre

doi:10.1109/ddecs.2011.5783079

Cited by 8 publications

(7 citation statements)

References 12 publications

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“…Power efficiency improves when supply voltage reduces [16]. QDI circuits are highly tolerant to supply downscaling, as recently demonstrated [17].…”

Section: Experimental Setup and Resultsmentioning

confidence: 93%

Quasi Delay Insensitive FIFOs: Design Choices Exploration and Comparison

Rodolfo

Sartori

Moreira³

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper explores asynchronous FIFOs design choices, more specifically FIFOs from the quasi-delay insensitive (QDI) template family. It proposes eight different asynchronous FIFO structures on a CMOS 45nm technology, using a QDI standard cell library. Structures are exercised through analogmixed-signal simulation, ranging from nominal to subthreshold supply voltages. Follows a comparison of area, throughput and power efficiency. The experimental results allow inferring a technique for designers to select the most adequate QDI FIFO flavor for specific circuits. Insight on the experiments assesses the beneficial and/or limiting effects of using the specific cell library.

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“…Power efficiency improves when supply voltage reduces [16]. QDI circuits are highly tolerant to supply downscaling, as recently demonstrated [17].…”

Section: Experimental Setup and Resultsmentioning

confidence: 93%

Quasi Delay Insensitive FIFOs: Design Choices Exploration and Comparison

Rodolfo

Sartori

Moreira³

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…There are several ways to implement Celements and other sequential gates composing libraries for QDI asynchronous design, for this see e.g. references [43] and [44]. However, three basic transistor topologies stand as the most accepted and employed in practical circuits: Martin's [45] Sutherland's [46] and van Berkel's [47] Celements.…”

Section: A Subthreshold Regime Operationmentioning

confidence: 99%

Robust and Energy-Efficient Hardware: The Case for Asynchronous Design

Calazans

Rodolfo

Sartori

2021

JICS

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The current technologies behind the design of semiconductor integrated circuits allow embedding billions of components in a singe silicon die, enabling the construction of very complex circuits in a tiny space, dissipating little energy and producing huge amounts of useful computational work. However, the current levels of integration for electronic components in silicon and similar materials are not easily managed, as parameter variations grow steadily, making the design tasks increasingly challenging. Synchronous techniques have dominated the digital system design landscape for many decades, but their costs are increasingly hard to cope with. Asynchronous design and particularly quasi-delay insensitive design promises to deal with the same challenges more gracefully in current advanced nodes, and possibly irrevocably in future technology nodes. This article proposes a review of the state of the art in using asynchronous circuit design techniques to achieve energy-efficient and robust digital circuit and system design. In particular, the definition of a robust digital circuit comprises addressing several aspects to which a digital system design is expected to be robust to, including: (1) voltage variations; (2) process variations; (3) temperature variations; (4) circuit aging. Besides addressing energy-efficiency and all the mentioned robustness aspects, this work also approaches some of the state-of-the-art tools available to deal with asynchronous design, and points to desirable research development to be conducted in these subjects in the future.

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“…One can take the idea of using rewrite rules further and automate the synthesis of networks with various specific non‐functional properties. For example, it has been shown that symmetric transistor networks exhibit much more predictable timing and power characteristics, which is especially valuable in the sub‐threshold design [10, 36]. One can express the symmetric transformation of transistor networks using the algebra and apply it to our NAND gate example producing its symmetric 8‐transistor version shown in Fig.…”

Section: Synthesismentioning

confidence: 99%

“…In particular, Figs. 5 b – d show standard static CMOS implementations of an AND gate, a C‐element [10] and an OR gate, while Figs. 5 a and e show optimised parameterised networks implementing parameterised C/AND and C/OR elements [16].…”

Section: Synthesismentioning

confidence: 99%

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Algebra of switching networks

Mokhov

2015

IET Computers & Digital Techniques

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Is it right, that regardless of the existence of the already elaborated algebra of logic, the specific algebra of switching networks should be considered as a utopia? Paul Ehrenfest, 1910Abstract A switch, mechanical or electrical, is a fundamental building element of digital systems. The theory of switching networks, or simply circuits, dates back to Shannon's thesis (1937), where he employed Boolean algebra for reasoning about the functionality of switching networks, and graph theory for describing and manipulating their structure. Following this classic approach, one can deduce functionality from a given structure via analysis, and create a structure implementing a specified functionality via synthesis. The use of two mathematical languages leads to a 'language barrier' -whenever a circuit description is changed in one language, it is necessary to translate the change into the other one to keep both descriptions synchronised. For example, having amended a circuit structure one cannot be certain that the circuit functionality has not been broken, and vice versa.This work presents a unified algebra of switching networks. Its elements are circuits rather than just Boolean functions (as in Boolean algebra) or vertices/edges (as in graph theory). This unified approach allows one to express both the functionality and structure of switching networks in the same mathematical language, thus removing the language barrier. It also brings in new methods of circuit composition that are of high importance for modern system design and development, which heavily rely on the reuse of components and interfaces. In this paper we demonstrate how to use the algebra to formally transform circuits, reason about their properties, and even solve equations whose 'unknowns' are circuits.

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Muller C-elements based on minority-3 functions for ultra low voltage supplies

Cited by 8 publications

References 12 publications

Quasi Delay Insensitive FIFOs: Design Choices Exploration and Comparison

Quasi Delay Insensitive FIFOs: Design Choices Exploration and Comparison

Robust and Energy-Efficient Hardware: The Case for Asynchronous Design

Algebra of switching networks

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