PBTI-Associated High-Temperature Hot Carrier Degradation of nMOSFETs With Metal-Gate/High- $k$ Dielectrics

Lee, Kyong Taek; Kang, Chang Yong; Yoo, Ook Sang; Choi, Rino; Lee, Byoung Hun; Lee, J.C.; Lee, Hi‐Deok; Jeong, Yoon–Ha

doi:10.1109/led.2008.918257

Cited by 27 publications

(6 citation statements)

References 16 publications

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“…hot-carrier induced damage usually becomes less pronounced at elevated temperatures [72][73][74][75][76][77]. Note that this traditional tendency is typical only for (relatively) long-channel devices while for ultra-scaled MOSFETs HCD becomes more significant at higher temperatures due to the dominant role of electron-electron scattering and its impact on the carrier distribution function [3,[78][79][80].…”

Section: Ecs Transactions 35 (4) 321-352 (2011)mentioning

confidence: 99%

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Physics-Based Hot-Carrier Degradation Modeling

Tyaginov¹,

Starkov²,

Enichlmair³

et al. 2011

ECS Trans.

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We present and verify a physics-based model of hot-carrier degradation (HCD). This model is based on a thorough solution of the Boltzmann transport equation. Such a solution can be achieved using either a stochastic solver based on the Monte Carlo approach or a deterministic counterpart that is based on representation of the carrier energy distribution function as a series of spherical harmonics. We discuss and check two implementations of our model based on these methods. The model is verified vs. the HCD experimental data measured in longchannel transistors as well as in ultra-scaled MOSFETs. Because both stochastic and deterministic methods have advantages and shortcomings, we study the limits of applicability of these methods. We aim to cover and link all main features of HCD, namely, the interplay between hot and colder carriers, which leads to two competing mechanisms of bond breakage and the strong localization of hot-carrier damage. Our model is linked and compared with other approaches to HCD simulations. Special attention is paid to the importance of the particular model ingredients, such as competing mechanisms of the Si-H bond dissociation, electron-electron scattering, variations in the bond-breakage energy, as well as its reduction due to the interaction between the dipole moment of the bond and the electric field. We also analyze the role of electron-electron scattering in HCD measured in devices with different gate lengths.

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Section: Ecs Transactions 35 (4) 321-352 (2011)mentioning

confidence: 99%

“…As a result, the contribution from the SP-mechanism is increased. Additionally, just electron-electron scattering defines the acceleration of HCD at elevated temperatures, which is pronounced in the case of extremely-scaled MOSFETs [3,[78][79][80].…”

Section: Ecs Transactions 35 (4) 321-352 (2011)mentioning

confidence: 99%

Physics-Based Hot-Carrier Degradation Modeling

Tyaginov¹,

Starkov²,

Enichlmair³

et al. 2011

ECS Trans.

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“…10,11) These issues can increase bias temperature instability (BTI) or hot carrier (HC)-induced degradation and decrease device lifetime t L . [12][13][14] HC-induced degradation in p-type MOSFETs (pMOSFETs) is caused by channel hot carrier (CHC) stress or drain avalanche hot carrier (DAHC) stress. 15) CHC stress with a gate voltage V g equal to a drain voltage V d induces injection of highly-energetic holes directly into the gate oxide and the generation of additional interface states N it .…”

Section: Introductionmentioning

confidence: 99%

Channel-length dependence of the generation of interface states and oxide-trapped charges on drain avalanche hot carrier degradation of HfSiON/SiO₂p-channel MOSFETs with strained Si/SiGe channel

Kim¹,

Roh²,

Kang³

2020

Jpn. J. Appl. Phys.

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This paper evaluates how channel length L affects the drain avalanche hot carrier degradation (DAHC) degradation mechanism of HfSiON/SiO 2 pMOSFETs that have strained Si/SiGe channel. DAHC degradation occurred as L was to reduced < 70 nm, and the amount of degradation increased as L decreased. In the early stage of stress, DAHC degradation increased positively due to generation of negative oxide charges -Q ox , but gradually-generated interface states N it neutralize -Q ox , so a transition point occurs and eventually DAHC increases negatively after sufficient stress time t s . The distribution of DAHC degradation was also analyzed after t s = 4000, 40000 s. The effects of additional generation of -Q ox and N it on DAHC degradation contribute more near the drain edge than to the center region, and increase as L decreases. Therefore, further research on the DAHC degradation mechanism should be conducted to predict the reliability of HfSiON/SiO 2 pMOSFETs with mechanical strain engineering.

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“…3(c) shows the V TH shift induced by HCD and PBS for various V G . For HCD, the cold carriers associated with PBS have a simultaneous effect on the channel region due to pre-existing traps; 27,28 thus, the cold carrier injection should be eliminated by PBS for better clarification. After removing V TH shift due to cold carrier injection, surprisingly the V TH shift of V G ¼ 2.0 V was still more severe than V G ¼ 1.6 V, even though maximum I.I.…”

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confidence: 99%

Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

Tsai

Chang

Chen

et al. 2014

Applied Physics Letters

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This work investigates electron-electron scattering (EES)-induced channel hot electron (CHE) injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors (n-MOSFETs) with high-k/metal gate stacks. Many groups have proposed new models (i.e., single-particle and multiple-particle process) to well explain the hot carrier degradation in nanoscale devices and all mechanisms focused on Si-H bond dissociation at the Si/SiO 2 interface. However, for high-k dielectric devices, experiment results show that the channel hot carrier trapping in the pre-existing high-k bulk defects is the main degradation mechanism. Therefore, we propose a model of EES-induced CHE injection to illustrate the trapping-dominant mechanism in nanoscale n-MOSFETs with high-k/metal gate stacks. V

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PBTI-Associated High-Temperature Hot Carrier Degradation of nMOSFETs With Metal-Gate/High- $k$ Dielectrics

Cited by 27 publications

References 16 publications

Physics-Based Hot-Carrier Degradation Modeling

Physics-Based Hot-Carrier Degradation Modeling

Channel-length dependence of the generation of interface states and oxide-trapped charges on drain avalanche hot carrier degradation of HfSiON/SiO₂p-channel MOSFETs with strained Si/SiGe channel

Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

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PBTI-Associated High-Temperature Hot Carrier Degradation of nMOSFETs With Metal-Gate/High- $k$ Dielectrics

Cited by 27 publications

References 16 publications

Physics-Based Hot-Carrier Degradation Modeling

Physics-Based Hot-Carrier Degradation Modeling

Channel-length dependence of the generation of interface states and oxide-trapped charges on drain avalanche hot carrier degradation of HfSiON/SiO2p-channel MOSFETs with strained Si/SiGe channel

Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

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Channel-length dependence of the generation of interface states and oxide-trapped charges on drain avalanche hot carrier degradation of HfSiON/SiO₂p-channel MOSFETs with strained Si/SiGe channel