Practical OEICs based on the monolithic integration of GaAs-InGaP LEDs with commercial GaAs VLSI electronics

Ahadian, J.; Vaidyanathan, P.T.; Patterson, Steven G.; Royter, Y.; Mull, D.E.; Petrich, G.S.; Goodhue, W. D.; Prasad, S.; Kolodziejski, L. A.; Fonstad, Clifton G.

doi:10.1109/3.687852

Cited by 14 publications

(5 citation statements)

References 8 publications

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“…Another approach is to process the first device type before the growth and processing of the second device type. This can also be done after the full interconnect stack for the first device type is finished by etching windows in the dielectric before growth (14). Instead of epitaxial growth, wafer bonding can be utilized for heterogeneous integration of two materials.…”

Section: Heterogeneous Integration Methods (11)mentioning

confidence: 99%

(Invited) Heterogeneous Integration of InP HBTs on CMOS: Leveraging and Providing Value to Conventional Silicon Technologies

Royter

Patterson

et al. 2013

ECS Trans.

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Historically, compound semiconductors have enjoyed the benefit of material properties that lend themselves to high performance electron devices, but the ability to fabricate complex, high transistor count ICs is limited by the relative immaturity of the material system and small commercial market. Silicon based devices have made significant advances in device performance, but have not yet matched compound semiconductor device performance. However, a large commercial market has allowed the silicon system to mature and produce billion transistor count ICs in high volume. It would be advantageous to combine the merits of both compound semiconductors and silicon based CMOS/BiCMOS to enable a new class of high performance ICs. This work will review HRL's efforts in wafer scale integration of an advanced 250nm, 350GHz fT/fMAX InP DHBT technology with RF-CMOS technologies whose device proximity; heterogeneous interconnect density; and additional technology features both leverage and provide additional value to conventional silicon technologies.

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Section: Heterogeneous Integration Methods (11)mentioning

confidence: 99%

(Invited) Heterogeneous Integration of InP HBTs on CMOS: Leveraging and Providing Value to Conventional Silicon Technologies

Royter

Patterson

et al. 2013

ECS Trans.

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“…A detailed description of the current EoE process can be found elsewhere. 14 Here, the evolution of the EoE process is summarized to clarify the reasoning that has gone into its development and to point out the significance of the key process innovations.…”

Section: Eoe Integration Processmentioning

confidence: 99%

“…The mean and standard deviation of the extracted inverter delay is 67Ϯ2 ps both before and after growth and fabrication, confirming that the electronics are not affected by the EoE process. 14 The material change from AlGaAs to InGaAsP necessitates the use of a different etching chemistry in the EoE process step of postgrowth polycrystalline deposit removal. This step, which originally used a wet etch, was additionally altered to use a dry etch to enhance the overall robustness of the process.…”

Section: Eoe Integration Processmentioning

confidence: 99%

“…This step, which originally used a wet etch, was additionally altered to use a dry etch to enhance the overall robustness of the process. 14 The EoE process concludes with optoelectronic device fabrication. By adjusting the total height of the optoelectronic device structure to match the thickness of the interconnect dielectric stack, a planar die surface is attained following removal of the polycrystalline deposits.…”

Section: Eoe Integration Processmentioning

confidence: 99%

“…Work on EoE began [1][2][3][4][5][6][7][8][9][10][11][12][13][14] at the Massachusetts Institute of Technology ͑MIT͒ in 1990. Initial results included the fabrication of LED-based neural-network optoelectronic integrated circuits 4 ͑OEICs͒ as well as the integration of resonant tunneling diodes 7 ͑RTDs͒ and surface-normal multiple-quantum-well modulators 8 ͓also known as selfelectro-optic devices ͑SEEDs͔͒.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status

Ahadian

Fonstad

1998

Opt. Eng

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Optoelectronic very large scale integrated (OE-VLSI) circuits are a basic component of optical interconnects proposed to overcome the limitations of high-speed electrical interconnects. Epitaxy-onelectronics (EoE), a monolithic integration technology capable of combining thousands of optoelectronic devices with VLSI-complexity GaAs Electronics, is reviewed. The fundamental assumptions on which the EoE technology is founded are explained and the development of the EoE integration process is reviewed. Then, the recently completed OPTOCHIP research foundry project, which made LED-based optoelectronic integrated circuits (OEICs) available to optical interconnect researchers, is described. Finally, integrated LED, photodetector, and circuit characterization results are detailed. These results show the utility of EoE OEICs in implementing optical interconnect architectures and point out current performance limitations. © 1998 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(98)01012-5]

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A new analytical model for photo-dependent capacitances of GaAs MESFET’s with emphasis on the substrate related effects

Murty

Jit

2006

Solid-State Electronics

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Practical OEICs based on the monolithic integration of GaAs-InGaP LEDs with commercial GaAs VLSI electronics

Cited by 14 publications

References 8 publications

(Invited) Heterogeneous Integration of InP HBTs on CMOS: Leveraging and Providing Value to Conventional Silicon Technologies

(Invited) Heterogeneous Integration of InP HBTs on CMOS: Leveraging and Providing Value to Conventional Silicon Technologies

Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status

A new analytical model for photo-dependent capacitances of GaAs MESFET’s with emphasis on the substrate related effects

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