Probability propagation and decoding in analog VLSI

Loeliger, Hans-Andrea; Lustenberger, Felix; Helfenstein, M.; Tarkoy, F.

doi:10.1109/18.910594

Cited by 129 publications

(50 citation statements)

References 24 publications

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“…As we know, practical implementations of the iterative‐based decoding algorithms is done in parallel way . So the effect of the multiplicative correction factor can be applied on the BP decoding circuits using a scale transistor . Also, the effect of the additive factor can be applied to the calculations by adding a few AND/OR logical gates to the BP decoding circuits.…”

Section: Simulation Resultsmentioning

confidence: 99%

A high‐performance belief propagation decoding algorithm for codes with short cycles

Karimi-lenji

Houshmand

Zarmehi

2017

Int J Communication

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The simplicity of decoding is one of the most important characteristics of the low density parity check (LDPC) codes. Belief propagation (BP) decoding algorithm is a well-known decoding algorithm for LDPC codes. Most LDPC codes with long lengths have short cycles in their Tanner graphs, which reduce the performance of the BP algorithm. In this paper, we present 2 methods to improve the BP decoding algorithm for LDPC codes. In these methods, the calculation of the variable nodes is controlled by using "multiplicative correction factor" and "additive correction factor." These factors are obtained for 2 separate channels, namely additive white Gaussian noise (AWGN) and binary symmetric channel (BSC), as 2 functions of code and channel parameters. Moreover, we use the BP-based method in the calculation of the check nodes, which reduces the required resources. Simulation results show the proposed algorithm has better performance and lower decoding error as compared to BP and similar methods like normalized-BP and offset-BP algorithms.

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Section: Simulation Resultsmentioning

confidence: 99%

A high‐performance belief propagation decoding algorithm for codes with short cycles

Karimi-lenji

Houshmand

Zarmehi

2017

Int J Communication

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“…The term "probabilistic computing" has multiple meanings [11,28,50,72,88,90,137]. Different methodologies are used in designing devices and systems for probabilistic computing.…”

Section: Probabilistic Techniques and Modelsmentioning

confidence: 99%

Introduction to Noise-Resilient Computing

Yanushkevich

Kasai

Tangim

et al. 2013

Synthesis Lectures on Digital Circuits and Systems

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“…BJT-based Gilbert cells [7] are used to perform the LLR-toprobability conversion, the multiplication and the addition on the probabilities. This simple sum-product circuit was demonstrated in [8] for any field of probability and has been used in a number of analog decoders [9]. For instance, in Fig.…”

Section: A Sum-product Nodesmentioning

confidence: 99%

Trade-off between surface, biasing current and performance of an analog turbo decoder

Duchaux

Lahuec

Seguin

et al. 2009

2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference

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This paper presents the trade-off between surface, biasing current and performance of an analog turbo decoder. It is shown that the biasing current and the parasitic emitter resistor can deteriorate the performance of a decoder. The parasitic emitter resistor depends on the emitter area and the biasing current depends on the maximum decoding speed required. Simulations show that the parasitic emitter resistor can deteriorate the performance by 0.35dB for BER of 10 −2 for a 0.25-μm process from NXP. It is also shown that an increase of seven percent of the size of the transistor can divide the emitter resistor by four and thus reduces the deterioration of performance to 0.05dB. In the same way, reducing the biasing current improves the performance but reduces the maximum decoding speed.

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Probability propagation and decoding in analog VLSI

Abstract: Abstract-The sum-product algorithm (belief/probability propagation) can be naturally mapped into analog transistor circuits. These circuits enable the construction of analog-VLSI decoders for turbo codes, low-density parity-check codes, and similar codes.

Cited by 129 publications

References 24 publications

A high‐performance belief propagation decoding algorithm for codes with short cycles

A high‐performance belief propagation decoding algorithm for codes with short cycles

Introduction to Noise-Resilient Computing

Trade-off between surface, biasing current and performance of an analog turbo decoder

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