Probing Approximate TMR in Error Resilient Applications for Better Design Tradeoffs

Arifeen, Tooba; Hassan, Abdus Sami; Moradian, Hossein; Lee, Jeong-A

doi:10.1109/dsd.2016.57

Cited by 20 publications

(12 citation statements)

References 7 publications

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“…Through ATLANTA, it is concluded that input vectors 0000 and 0001 are vulnerable to errors, and hence, are pre‐blocked for approximation. The original function ( G ) is transformed to approximate modules ( fn ) by complementing min/maxterms [1]. A prime implicant (PI) is an implicant that cannot be covered by a more general implicant.…”

Section: Proposed Methodologymentioning

confidence: 99%

“…The area overhead problem can be handled through approximate computing using approximate circuits for TMR modules (approximate TMR – ATMR) such that only one of the modules differs from the original circuit at each input vector scenario, allowing the majority voter to still select two match outputs out of three for any input vector. Table 1 shows an ATMR, where f 1, f 2, and f 3 are approximate functions, G is the original function, and V is the voter output [1]. Let us assume that for a given example in Table 1, a TMR is constructed as

f 1 = f 2 = f 3 = G

and an error occurs at f 2 for input vector 000.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Input vulnerability‐aware approximate triple modular redundancy: higher fault coverage, improved search space, and reduced area overhead

et al. 2018

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Area overhead reduction in conventional triple modular redundancy (TMR) by using approximate modules has been proposed in the literature. However, the vulnerability of approximate TMR (ATMR) in the case of a critical input, where faults can lead to errors at the output, is yet to be studied. Here, identifying critical input space through automatic test pattern generation and making it unavailable for the technique of approximating modules of TMR (ATMR) were focused, which involves a prime implicant reduction expansion. The results indicate that the proposed method provides 75-98% fault coverage, which amounts up to 43.8% improvement over that achieved previously. The input vulnerability-aware approach enables a drastic reduction in search space, ranging from 41.5 to 95.5%, for the selection of candidate ATMR modules and no compromise on the area overhead reduction is noticed.

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Section: Proposed Methodologymentioning

confidence: 99%

f 1 = f 2 = f 3 = G

and an error occurs at f 2 for input vector 000.…”

Section: Introductionmentioning

confidence: 99%

Input vulnerability‐aware approximate triple modular redundancy: higher fault coverage, improved search space, and reduced area overhead

et al. 2018

Self Cite

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show abstract

“…Approximate TMR (ATMR) is based on implementing each redundancy task with a different architecture or algorithm [35]. When applied to hardware projects, ATMR has been presented as a way to achieve fault coverage almost as good as traditional TMR but avoiding the huge area overhead that it costs [36]. Designers might accept a lower fault coverage if the area overhead of the project is to drop significantly.…”

Section: Approximation and Fault Tolerancementioning

confidence: 99%

Survey on Approximate Computing and Its Intrinsic Fault Tolerance

2020

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This work is a survey on approximate computing and its impact on fault tolerance, especially for safety-critical applications. It presents a multitude of approximation methodologies, which are typically applied at software, architecture, and circuit level. Those methodologies are discussed and compared on all their possible levels of implementations (some techniques are applied at more than one level). Approximation is also presented as a means to provide fault tolerance and high reliability: Traditional error masking techniques, such as triple modular redundancy, can be approximated and thus have their implementation and execution time costs reduced compared to the state of the art.

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“…These works have shown good results by compensating the costs of fault tolerance techniques with the speed-up obtained through AC. However, most of the works presented are at the circuit level [10,[31][32][33][34] or require special architecture [9,29,35,36], so hardware modifications are still necessary. This means that those works are not suitable for COTS processors.…”

Section: Fault Tolerance With Approximate Computing Techniquesmentioning

confidence: 99%

Using Approximate Computing and Selective Hardening for the Reduction of Overheads in the Design of Radiation-Induced Fault-Tolerant Systems

2019

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Fault mitigation techniques based on pure software, known as software-implemented hardware fault tolerance (SIHFT), are very attractive for use in COTS (commercial off-the-shelf) microprocessors because they do not require physical modification of the system. However, these techniques cause software overheads that may affect the efficiency and costs of the overall system. This paper presents a design method of radiation-induced fault-tolerant microprocessorbased systems with lower execution time overheads. For this purpose, approximate computing and selective fault mitigation software-based techniques are used; thus it can be used in COTS devices. The proposal is validated through a case study for the TI MSP430 microcontroller. Results show that the designer can choose among a wide spectrum of design configurations, exploring different trade-offs between reliability, performance, and accuracy of results.

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Probing Approximate TMR in Error Resilient Applications for Better Design Tradeoffs

Cited by 20 publications

References 7 publications

Input vulnerability‐aware approximate triple modular redundancy: higher fault coverage, improved search space, and reduced area overhead

Input vulnerability‐aware approximate triple modular redundancy: higher fault coverage, improved search space, and reduced area overhead

Survey on Approximate Computing and Its Intrinsic Fault Tolerance

Using Approximate Computing and Selective Hardening for the Reduction of Overheads in the Design of Radiation-Induced Fault-Tolerant Systems

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