Reconfigurable computing and electronic nanotechnology

Abstract

In this paper we examine the opportunities brought about by recent progress in electronic nanotechnologyMoore's law has been equated with a guaranteed stream of good news, bringing ever higher clock speeds and more hardware resources in each new hardware generation. Microarchitects have been significant beneficiaries, building faster processors and using more resources to exploit program parallelism. However, significant difficulties loom for the traditional approach to processor design.Traditional microarchitectures are monolithic in nature, as their component structures are tightly dependent on each other. Such designs are not scalable with the increasing amount of resources, and are already stretched to their limits. Approaches that aim at decoupling the components, but remain tied to previous architectural structures, introduce overhead and additional complexity.Recent advances in molecular electronics, combined with increased challenges in semiconductor manufacturing, create a new opportunity for computer architects -the opportunity to recreate computer architecture from the ground up. New device characteristics require us to rethink the basic abstraction of the transistor. New fabrication methods require us to rethink the basic circuit abstraction. The scale of the devices and wires allows us to rethink our basic approach to designing computing systems. On the one hand, the scale enables huge computing systems with billions of components. On the other hand, the scale forces us to rethink the meaning of a working system; it must be a reliable system made from unreliable components.Computer architecture builds computing systems as hierarchies of abstractions. Molecular computing may be a case where a reexamination of the layers of abstraction is required. In this paper we propose an alternative computer system architecture, based on dramatically different abstractions:

Defect tolerant probabilistic design paradigm for nanotechnologies

“…Moreover given the substantial degree of uncertainty inherent to nanoscale technologies, design will have to be framed in a probabilistic setting, if effective optimization of performance, yield, and other key figures of merit is to be achieved. It has been demonstrated that nanoelectronics technology is well suited to building reconfigurable computational fabrics [1,9,11]. This is significant because reconfigurability provides a powerful tool to circumvent the uncertainty associated with distributions of defects.…”

“…Unfortunately, an unstructured approach that requires mapping, synthesis and configuration at such a fine granularity would not scale for large nanosystems. In addition, the group testing strategy used for defect mapping in [9,11] requires unlimited connectivity among nanoblocks. Still, the key idea of using reconfiguration to achieve defect avoidance is the starting point for our work.…”

“…Defect avoidance approaches. An approach to nanosystem design is proposed in [9,11], which consists of first mapping defects on a large reconfigurable regular grid of nanoblocks, each of which can be configured as an AND, OR, XOR, half-adder etc., then synthesizing (offline) a feasible configuration realizing the application for each nanofabric instance, and finally configuring each instance accordingly. This approach has its roots in the TERAMAC experiment [16,8].…”

Architectural-level fault tolerant computation in nanoelectronic processors

“…Related research in defect tolerance in the nanoelectronic systems includes system level approaches [8] and logic level solutions [9,10]. These approaches reconfigure the redundant hardware to bypass the permanent faulty units.…”

Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics

“…In comparison to the fault masking The work of the first two authors is supported in part by NSF Grant 0082325. schemes, online repair schemes require significantly less hardware overhead [4], especially for regular systems where replacement of faulty components can be performed with common backup units [6,7]. In fact, as bottom-up fabrication, the expected mode of future nano circuit assembly, can only produce regular structures [8,9], a reconfiguration capability is necessary in any nanoelectronic system for the purpose of functionality formation in a post-fabrication stage, thus supporting repair online as well [10].…”