Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Much of the recent literature on SPICE transistor modeling ignores the requirements of application designers and instead emphasizes detail, physical accuracy, and complexity. While these advancements greatly improve model accuracy, they also serve to increase computational complexity, making the resulting models less attractive to application designers. While some authors depart from this trend and present models which emphasize simulation speed, their results and analysis are limited to qualitative observation. This research develops a methodology to quantify the computational cost of model features and competitively benchmark models against each other. Additionally, it reviews recently published SiC MOSFET models and presents a trade study on several candidate models likely to fare well in complex application simulations. Finally, this study also identifies key considerations which should be carried forward into future model design.