Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors

Tian, Guoliang; Bi, Jinshun; Xu, Gaobo; Xi, Kai; Yang, Xueqin; Majumdar, Sandip; Xu, Qing; Wang, Wenwu

doi:10.1007/s11432-019-2716-5

Cited by 3 publications

(1 citation statement)

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“…Significant progress has been made in promoting the development of the advanced technology, improving device performance, and exploring novel device applications for these HfO 2 -based FeFETs [ 7 , 8 , 9 , 10 ]. For example, they were integrated into technology nodes below 28 nm by fabricating FeFETs in non-planar configurations [ 11 ]; the performance of the FeFETs device was optimized by changing the device structure [ 12 , 13 ], and basic logic operation was realized [ 14 ]. These devices are also increasingly drawing the attention of the emerging neuromorphic and analog-in-memory computing sectors, showing the great prospects for applications of this ferroelectric technology [ 15 ].…”

Section: Introductionmentioning

confidence: 99%

Effects of Charge Trapping on Memory Characteristics for HfO2-Based Ferroelectric Field Effect Transistors

Wang

et al. 2023

Nanomaterials

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A full understanding of the impact of charge trapping on the memory window (MW) of HfO2-based ferroelectric field effect transistors (FeFETs) will permit the design of program and erase protocols, which will guide the application of these devices and maximize their useful life. The effects of charge trapping have been studied by changing the parameters of the applied program and erase pulses in a test sequence. With increasing the pulse amplitude and pulse width, the MW increases first and then decreases, a result attributed to the competition between charge trapping (CT) and ferroelectric switching (FS). This interaction between CT and FS is analyzed in detail using a single-pulse technique. In addition, the experimental data show that the conductance modulation characteristics are affected by the CT in the analog synaptic behavior of the FeFET. Finally, a theoretical investigation is performed in Sentaurus TCAD, providing a plausible explanation of the CT effect on the memory characteristics of the FeFET. This work is helpful to the study of the endurance fatigue process caused by the CT effect and to optimizing the analog synaptic behavior of the FeFET.

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