1999 57th Annual Device Research Conference Digest (Cat. No.99TH8393)
DOI: 10.1109/drc.1999.806309
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Source-side barrier effects with very high-K dielectrics in 50 nm Si MOSFETs

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Cited by 15 publications
(15 citation statements)
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“…In this study, device simulation examines both on-and off-state drain current in 50 nm devices with high-K gate insulators and sidewall spacers to reveal the effects of two-dimensional fringing-fields, due both to applied and internal voltages [9]. Asymmetric devices help to distinguish which effects arise on the sourceside.…”
Section: Introductionmentioning
confidence: 99%
“…In this study, device simulation examines both on-and off-state drain current in 50 nm devices with high-K gate insulators and sidewall spacers to reveal the effects of two-dimensional fringing-fields, due both to applied and internal voltages [9]. Asymmetric devices help to distinguish which effects arise on the sourceside.…”
Section: Introductionmentioning
confidence: 99%
“…In the case that dielectric constant is 10.0, current drivability is degraded to 85% of that of a device having a gate dielectric with a dielectric constant of 3.9 whereas it is degraded to 65% in the case that dielectric constant is 20.0. The degradation is more serious than that of conventional MISFETs with pn-junction source/drain, the amount of which is only 25% even in the case that dielectric constant is 200 [14]. Fig.…”
Section: Introductionmentioning
confidence: 92%
“…Introduction of silicide or pure-metal as Schottky source/drain materials may lower the sub-sequent annealing temperature after high-k film deposition and can avoid the high-k film degradation due to high-temperature process [13]. On the other hand, in the case of conventional MISFETs with pn-junction source/drain, it is pointed out that current drivability is significantly degraded due to FIBS in the case that high-k gate di-electrics are adopted [14]. Considering that current drivability of Schottky barrier source/drain transistors is strongly affected by a potential profile around source/ channel junction, it is foreseen that their current drivability is strongly influenced in the case of devices with high-k gate dielectrics.…”
Section: Introductionmentioning
confidence: 97%
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“…Kencke et al [8] studied the effect of FIBL with asymmetric devices having different source and drain spacer dielectrics. They found that FIBL is caused largely by drain side high-K spacers.…”
Section: Introductionmentioning
confidence: 99%