Structural advantages of silicon-on-insulator FETs over FinFETs in steep subthreshold-swing operation in ferroelectric-gate FETs

Ota, Hiroyuki; Migita, Shinji; Hattori, Junichi; Fukuda, Koichi; Toriumi, Akira

doi:10.7567/jjap.56.04cd10

Cited by 12 publications

(6 citation statements)

References 31 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Analysis reported that there is degradation in SS value for FinFET with embedded ferroelectric layer than SOI FET. 17 Comparative analysis reveals that NC-FinFET having HfZrO x as ferroelectric layer possess better switching and drain current characteristic among Conventional FET, Fe-FET, Conventional FinFET, and Fe-FinFET. 18 A SS value of 8.5 mV/dec.…”

Section: Introductionmentioning

confidence: 97%

Study on impact of ferroelectric layer thickness on RF /analog and linearity parameters in ferroelectric‐FinFET

Saha

Bhowmick

Baishya

2021

Int J RF Mic Comp-Aid Eng

View full text Add to dashboard Cite

In this paper, we systematically investigated the effect of ferroelectric (FE) layer thickness (t FE ) on transfer and RF/analog characteristics such as transconductance (g m ), total gate capacitance (C gg ), cut off frequency (f t ), transconductance frequency product, and unilateral power gain in Ferroelectric-FinFET (Fe-FinFET) through 3D TCAD simulator. Further, we highlighted the influence of t FE on linearity figure of merits (FoMs), higher order harmonics (g m2 and g m3 ), voltage intercept points (VIP 2 and VIP 3 ), third order power intercept point (IIP 3 ), third order intermodulation distortion (IMD 3 ), and 1-dB compression point (1-dB comp. Pnt.) for Fe-FinFET. Moreover, the harmonic distortion (HD) parameters like second and third order harmonic distortion (HD2 and HD3) and total harmonic distortion (THD) are reported taking t FE as a parameter. The noise spectral densities of Fe-FinFET taking t FE as parameter is also highlighted. The scaling of t FE has a significant impact on RF/analog parameters and these RF/analog FoMs are a function of t FE . It is also perceived that linearity and HD parameters are dependent on scaling of t FE . Results reveal that with increase in t FE , RF/analog characteristics degrades, whereas, superior linearity FoMs is achieved. It is also seen that HD parameters are improved with increased in t FE value. The increased in t FE leads to increase in noise spectral densities. Finally, the comparative study of electrical parameters of this work with the existing literature is investigated.

show abstract

Section: Introductionmentioning

confidence: 97%

Study on impact of ferroelectric layer thickness on RF /analog and linearity parameters in ferroelectric‐FinFET

Saha

Bhowmick

Baishya

2021

Int J RF Mic Comp-Aid Eng

View full text Add to dashboard Cite

show abstract

“…Negative capacitance (NC) field-effect transistor (NC-FET) has been proposed as one of the promising candidates beyond complementary metal-oxide-semiconductor (CMOS) device that may overcome the thermionic limit of 60 mV dec −1 by the internal amplification of gate voltage through ferroelectric materials 3–7 . Owing to their atomically thin body nature, two-dimensional (2D) transition metal dichalcogenides (TMDs) have been demonstrated to provide superior immunity to short-channel-effects 8–11 and suggested to achieve steep subthreshold slope over a wide voltage range for the NC-FET 12–14 . NC-FETs have been reported with TMDs as channel material and ferroelectric hafnium zirconium oxide (HZO) 15–17 or polymer 14,18 as ferroelectric gate.…”

Section: Introductionmentioning

confidence: 99%

Van der Waals negative capacitance transistors

et al. 2019

View full text Add to dashboard Cite

The Boltzmann distribution of electrons sets a fundamental barrier to lowering energy consumption in metal-oxide-semiconductor field-effect transistors (MOSFETs). Negative capacitance FET (NC-FET), as an emerging FET architecture, is promising to overcome this thermionic limit and build ultra-low-power consuming electronics. Here, we demonstrate steep-slope NC-FETs based on two-dimensional molybdenum disulfide and CuInP 2 S 6 (CIPS) van der Waals (vdW) heterostructure. The vdW NC-FET provides an average subthreshold swing (SS) less than the Boltzmann’s limit for over seven decades of drain current, with a minimum SS of 28 mV dec −1 . Negligible hysteresis is achieved in NC-FETs with the thickness of CIPS less than 20 nm. A voltage gain of 24 is measured for vdW NC-FET logic inverter. Flexible vdW NC-FET is further demonstrated with sub-60 mV dec −1 switching characteristics under the bending radius down to 3.8 mm. These results demonstrate the great potential of vdW NC-FET for ultra-low-power and flexible applications.

show abstract

“…The simulation study demonstrated that a thin body and a thin BOX SOI NCFET [Fig. 17 66) This is mainly because the SOI NCFET has a larger substrate capacitance with a thin BOX and better capacitance matching. Thus, the NC effect is beneficial to mature planar SOI transistor technologies, and an ultralow-power NCFET can be realized by a low-cost process.…”

Section: Ncfet With Fe-hfomentioning

confidence: 99%

A perspective on steep-subthreshold-slope negative-capacitance field-effect transistor

Kobayashi

2018

Appl. Phys. Express

View full text Add to dashboard Cite

In today’s highly information-oriented society, a continuously increasing number of computing devices are needed in the Internet-of-Things (IoT) era, from high-end servers in cloud to sensor node devices in edge. Under the constraint of power consumption, energy-efficient computing is necessary to enable low-power operation and implement emerging algorithms such as machine learning. A steep-subthreshold-slope (SS) transistor can be a next-generation device technology platform for highly energy-efficient computing. Among several types of steep-SS transistors, the negative-capacitance field-effect transistor (NCFET) has recently become one of the most promising candidates in terms of on-current, process integration, and cost, coincident with the discovery of ferroelectric HfO2. In this review paper, the concept and recent research studies on NCFET are reviewed. Technical challenges and future prospects are discussed.

show abstract

Structural advantages of silicon-on-insulator FETs over FinFETs in steep subthreshold-swing operation in ferroelectric-gate FETs

Cited by 12 publications

References 31 publications

Study on impact of ferroelectric layer thickness on RF /analog and linearity parameters in ferroelectric‐FinFET

Study on impact of ferroelectric layer thickness on RF /analog and linearity parameters in ferroelectric‐FinFET

Van der Waals negative capacitance transistors

A perspective on steep-subthreshold-slope negative-capacitance field-effect transistor

Contact Info

Product

Resources

About