2004 International Symposium on Electromagnetic Compatibility (IEEE Cat. No.04CH37559)
DOI: 10.1109/isemc.2004.1349812
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The PCB level ESD immunity study by using 3 dimension ESD scan system

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Cited by 25 publications
(5 citation statements)
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“…The practical implementation of (8) to estimate RS requires knowledge of the coupling length for each field component. They have a major influence on the estimated susceptibility level as it appears not only explicitly in (7) and (8), but also implicitly in (6) for the calculation of the average E or H-fields produced by the injection probe. The coupling lengths are not known from the outset and their extraction relies on the NFSI maps built from NFSI test results.…”
Section: B Practical Implementation Of the Estimation Methodsmentioning
confidence: 99%
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“…The practical implementation of (8) to estimate RS requires knowledge of the coupling length for each field component. They have a major influence on the estimated susceptibility level as it appears not only explicitly in (7) and (8), but also implicitly in (6) for the calculation of the average E or H-fields produced by the injection probe. The coupling lengths are not known from the outset and their extraction relies on the NFSI maps built from NFSI test results.…”
Section: B Practical Implementation Of the Estimation Methodsmentioning
confidence: 99%
“…EAR-field scan immunity (NFSI) [1] is a powerful diagnostic tool that reveals coupling areas at the integrated circuit (IC) and printed circuit board (PCB) levels, and that helps electromagnetic compatibility (EMC) experts and designers to identify the root-cause of failures that may trigger during radiated susceptibility (RS) tests. In part I of this twopart paper, several examples of NFSI applications were presented [2]- [8]. This research work aims at providing postprocessing methods of NFSI results in order to assess RS risks at the IC and PCB levels.…”
Section: Introductionmentioning
confidence: 99%
“…There it induces voltages and currents. These voltages or currents may cause bit-errors, wrong instructions, or even a system crash [2]. There is limit to solving ESD failure problems resulting out of the foregoing causes mentioned earlier with artwork design or ESD protection devices.…”
Section: Introductionmentioning
confidence: 95%
“…The system may continue to operate without any issues following an ESD incident, or strained systems may undergo soft failure and resume normal operation after rebooting with or without human action [6,8]. The system may potentially sustain a hard failure because of heat effects, dielectric breakdown, or a combination of the two [9][10][11][12].…”
Section: Introductionmentioning
confidence: 99%