VCO-based sigma delta modulator with PWM precoding

Abstract

Presented is a new ADC topology based on an asynchronous PWM modulator followed by a VCO and a counter. The PWM modulator first encodes the analogue input into a binary waveform. Then, the VCO implements a multibit first-order noise shaping modulator, sampling and quantising the input signal encoded by the PWM modulator. With this architecture, the linearity of the whole converter is independent of the VCO linearity as the VCO is modulated by a two valued signal only. Proposed is a hardware implementation suitable for low power applications that does not require linear amplifiers.Introduction: Continuous time sigma delta (CTSD) analogue-to-digital converters (ADCs) require a first integrator that is ultimately responsible for the performance of the overall converter. This first integrator is usually implemented with a CMOS operational amplifier that consumes a large silicon area and a significant part of the power budget to achieve gain and linearity. For this reason, there has been a search for new topologies that permit mostly digital ADC implementations. One of these topologies is based on a voltage controlled oscillator (VCO) [1], which provides a multibit quantised output with a simple ring oscillator but at the expense of uncompensated distortion due to the nonlinear voltage-to-frequency conversion of the VCO. On the other hand, pulse width modulation (PWM) has been used to implement efficient ADCs but still requiring either linear integrators [2] or a power consuming time to digital converter (TDC) [3]. In this Letter, we present an architecture that combines both the VCO and the PWM approaches to implement a converter that mitigates the nonlinearity problems of VCOs without requiring high performance operational amplifiers.

Continuous time Δ Σ modulation with PWM pre-coding and binary g m blocks

“…Recently, various A/D conversion techniques that employ some kind of Pulse Width Modulation (PWM) have been presented [1,2,3]. Such a PWM converts a baseband signal into a two-level continuous time waveform.…”

“…This technique is referred to as PWM pre-coding. In prior work, PWM pre-coding has been used to linearize a VCO-based ADC [1]. Alternatively, in [2] a time-to-digital converter was combined with a PWM pre-coding to convert the PWM signal into the digital domain.…”

“…Alternatively, in [2] a time-to-digital converter was combined with a PWM pre-coding to convert the PWM signal into the digital domain. The former approach [1] achieves a 1st order quantization noise shaping, while the latter [2] exhibits no noise shaping at all.…”

“…The Pulse-Width Modulator is also an easy-to-design block [1]. In its simplest version, it consists of a schmitt-trigger and a passive loop filter.…”

“…However, a potential problem with a PWM signal is that it contains many harmonics of f c, the carrier frequency of the PWM. If these harmonics fall near integer multiples of f s, where fs is the clock frequency of the DSM, after sampling in the DSM loop, they might alias to the baseband and corrupt the desired signal [1]…”