This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model. Index Terms-Circuit modeling, integrated circuit design, MOS analog integrated circuits, MOS devices.
a b s t r a c tIn this work we apply the current-based threshold voltage definition (equality between the drift and diffusion components of drain current) to intrinsic symmetric double-gate MOSFETs. We show that the half maximum point of the g m /I D (transconductance-to-current ratio) curve in the linear region corresponds exactly to the condition I Ddrift = I Ddiff when mobility variation is neglected. Numerical simulations show that the threshold voltages determined from the g m /I D curve and from the I Ddrift = I Ddiff condition differ by about / t /2 (one half of the thermal voltage) when considering realistic mobility variations. Simulation results show that the threshold voltages determined with the g m /I D procedure are close to those obtained with the Y (=I D = ffiffiffiffiffiffi g m p ) function method for a considerable range of silicon film thicknesses, channel lengths, and temperature values. The current-based procedure has also been successfully applied experimentally to a FinFET over a wide temperature range.
This paper presents a physically based model of the MOSFET output conductance. The drain current and the output conductance of the MOS transistor are accurately described by single-piece functions of the inversion charge densities at source and drain. Carrier velocity saturation, channel length modulation (CLM) and drain induced barrier lowering (DIBL) are included in a single-piece analytical model. The results herein can be readily applied for first order analog circuit hand calculation.
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