Patterningof 100 nm critical dimension features using X-ray proximity lithography is discussed. Lithographic performance is shown using photoresists APEX-E. UV-4 and an experimental formulation of ESCAP photoresist. Conditions to pattern isolated and nested lines at maximum permissible gap is discussed.

Nano-beam diffraction (NBD) has been successfully used in measuring channel strain in device of embedded SiGe (eSiGe). Strain measurements have been correlated to different processing conditions and microstructures of eSiGe and device performance. For intrinsic eSiGe without growth defect with 15-17%Ge, the average channel strain measured by NBD is ~ -0.55%, consistent with our previous measurement by convergent electron beam diffraction (CBED) and TCAD simulation. For graded eSiGe with average ~22%Ge, the average channel strain measured by NBD is ~ -0.90%, which is lower than the TCAD simulation. Differences between experimental results and simulation are also discussed.

The effects of excess phosphorous on plasma etching of polycrystalline silicon were studied by SEM and TEM. The phosphorous levels were altered by the time duration of POCI~ deposition, by the presence or absence of a phosphosilicate glass layer during high temperature treatments, and by using either an N2 or O~ drive-in anneal thereby causing the snow plow effect of oxidation to locally increase the phosphorous levels. Wherever the phosphorous levels were highest (at the poly-Si free surface or at grain boundaries), the extent of plasma etching was greatest. This etching effect was found to cause poly-Si line edge roughening.* Electrochemical Society Active Member.

This paper describes results achieved from the fabrication of 64Mb DRAM chips using x-ray lithography for the gate level. Three lots were split at the gate level for exposure with either Micrascan 92 at IBM's Advanced Semiconductor Technology Center (ASTC) or x-ray at the Advanced Lithography Facility (ALF) containing a Helios superconducting storage ring and a Suss stepper. The x-ray mask was fabricated at MMD (Microlithographic Mask Development Facility) as a two-chip mask containing one chip which had zero defects.To achieve adequate overlay performance between the x-ray exposed gate level and previous optically-printed levels, the mask was fabricated with an intentional magnification correction. The alignment scheme for both Suss and Micrascan was first order to an ASM zero level, and second order to each other. Results from the first lot show 90% of the chips tested achieved a target for the Suss to Micrascan overlay. Critical dimension control (across wafer and across chip) was measured and found to be comparible between Suss and Micrascan.Electrical performance was comparable to the optical wafers. Chips were fabricated with zero defects in many of the 1 Mb segments. There were also x-ray fabricated chips which demonstrated 63Mb addressable bits.Keywords: x-ray lithography, x-ray stepper, x-ray resist, x-ray yield 1 * On business leave of absence to Loral FSC 112 ISPIE Vol. 2437 0819417858/95/$6.OO Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/23/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx

A joint Motorola/IBM experiment was performed in mix-and-match lithography across widely separated locations. A simple pattern placement metrology data set was created, and x-ray masks were manufactured according to this data at the IBM Advanced Mask Facility in Burlington, VT. The same data was converted into a 5x reticle and optically stepped on wafers at the Motorola Advanced Product R&D Lab in Austin, TX. The x-ray mask was designed to print upon two optical fields with one x-ray exposure. The x-ray mask was aligned to the wafers at the IBM Advanced Lithography Facility in East Fishkill, NY, to produce box-in-box images for overlay metrology.The main overlay problems encountered were systematic offsets between xray and optical images, and average magnification error of -8 ppm. The magnification error is substantial because of the 3°C temperature difference between the optical stepper stage and the x-ray mask-writer. In an actual device run, the magnification differences will be removed by compensation in the e-beam writing of the x-ray mask. Offsets will be removed by use of a send-ahead wafer to determine the correct offset alignment in the x-ray stepper. It should then be possible to obtain excellent overlay on both of the paired optical fields, since the optical tool is blind-stepping a very reliable grid.