No abstract

No abstract

Silicon-on-Insulator (501) MEMS devices (1) are rapidly gaining popularity in realising numerous solutions for MEMS, especially in the optical and inertia application fields. BCO recently developed a DRIE trench etch, utilising the Bosch process, and refill process for high voltage dielectric isolation integrated circuits on thick SOT substrates (2,3,4). In this paper we present our most recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilised to develop optical router and filter products for fibre optics telecommunications and high precision accelerometers.SOT MEMS allows thicker structures, common with bulk micromachining, to be integrated with CMOS, as utilised in surface micromachining. The buried sacrificial oxide layer enables 3-D structures to be implemented in single crystal silicon which removes the stress associated with polysilicon. This offers substantial improvements in increased lateral sensitivity for inertia applications and it facilitates the removal of the perforated surface in MOEMS designs by etching through the handle wafer to release the mirrors.Although the Bosch process was the catalyst that allowed High Aspect Ratio Micromachining (HARM) products to be developed, processes have historically been restricted to bulk micromachining due to the lateral etch characteristics, at the buried oxide interface, for SOT substrates. Several 501 etch processes will be presented that clearly demonstrate the elimination of this notching effect. These applications will include multi feature 501 etching to oxide and through the wafer anisotropic etching.

Over the last 5 years, deep dry etching of silicon has developed into a mainstream microsystems process technology. To transition from R&D into production, some of the main issues to address are the CoO (cost of ownership), reliability and reproducibility of capital equipment. Commensurate with this, it is essential to achieve high etch rates with good profile control. MICROSPECT (Microsystems Production Evaluated Cluster Tool), a project within the EC SEA programme, has sought to address these issues. The project has evaluated and significantly enhanced the performance of STS ASE modules for deep dry etching on an ASPECT HR production cluster platform.The development phase of the project has provided an ideal opportunity for the equipment supplier to test and respond to feedback on the tool and the latest hardware and software developments with multiple end users, including a new high density inductively coupled plasma (ICP) source. This has resulted in higher etch rates for greater throughput and improved profile control across a variety of applications, including silicon-on-insulator (SOI)-based MEMS and microfluidics. During the evaluation phase, the system was operated under close-to-production conditions to establish system reliability and metrics.

Time-sequential surface tension self-assembly allows the demonstration of 90˚ rotated structures. The limiter mechanism of Figure 2b is first used to construct a stop in mid air above the substrate, which then prevents further rotation of an additional component when it has rotated through 90˚. These structures may act as fixed mirrors; however, they may also carry other optical components. For example, Figure 5 shows arrays of 80 µm diameter refractive microlenses, which have been formed by reflow molding of photoresist 8 without introducing any additional process complexity.