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High-resolution Sigma-Delta (ΣΔ) ADCs are increasingly used in portable medical applications for the measurement of biopotential signals. This paper presents the implementation and measurements of a novel ultra-low power low voltage multi-bit continuous-time sigma-delta (CT-ΣΔ) modulator, whose quantizer and feedback DACs operate in the time domain. Instead of the conventional flash quantizer and mismatch corrected multi-bit feedback DACs, a Dual-Slope (DS) quantizer and a Pulse-Width Modulated (PWM) DACs have been adopted in this design. The modulator has been implemented in a standard 0.18μm CMOS technology and features 83dB dynamic-range (DR) for a signal bandwidth of 256Hz. When clocked at 917kHz it consumes 13.3μW from a 1.4V supply.

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This paper presents a low-power switched-capacitor ∆Σ modulator for digital hearing-aid applications that features a novel summing successive approximation (SAR). The summing SAR performs multi-bit quantization together with the analog addition required in feed-forward (FF) ∆Σ modulator (∆ΣM) topologies, with no attenuation of the input signals and no need for amplifiers. The prototype is implemented in a 0.18- μ m CMOS technology and its measurements demonstrate a dynamic range of 88 dB in 10 kHz bandwidth while consuming 155 μW from a 1.8 V supply. The combined use of passive addition and SAR quantization reduces the complexity and power consumption of the modulator. The summing SAR ADC quantizer results in a calculated power saving of 40% when compared to a multi-bit FF ∆ΣM using active addition and flash quantization.

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