In most computational systems memory access represents a relevant bottleneck for circuits performance. The execution speed of algorithms is severely limited by memory access time. An emerging technology like NanoMagnet Logic (NML), where its magnetic nature leads to an intrinsic memory ability, represents therefore a very promising opportunity to solve this issue. NanoMagnet Logic is the ideal candidate to implement the so called Logic-In-Memory (LIM) architecture. But how is it possible to organize an architecture where logic and memory are mixed and not separated entities?In this paper we try to address this issue presenting our recent developments on LIM architectures. We originally conceived a LIM architecture without considering any technological constraints. Here we present the first adaptation of that architecture to NanoMagnet Logic technology. The architecture is based on an array of identical cells developed on three virtual layers, one for logic, one for memory and one for information routing. These three virtual layers are mapped on two physical layers exploiting all our recent improvements on NanoMagnet Logic technology, which are validated with the help of low level simulations. The structure has been tested implementing two different algorithms, a sort algorithm and an image manipulation algorithm. A complete characterization in terms of area and power is reported. The structure here presented is therefore the first step of an ongoing effort directed toward the development of truly innovative architectures.

In recent years Field-Coupled devices, like Quantum dot Cellular Automata, are gaining an ever increasing attention from the scientific community. The computational paradigm beyond this device topology is based on the interaction among neighbor cells to propagate information through circuits. Among the various implementations of this theoretical principle, NanoMagnet Logic (NML) is one the most studied, due to some interesting features, like the possibility to combine memory and logic in the same device and the possible low power consumption. Since the working principle of Field-Coupled devices is completely different from CMOS technology, it is important to understand all the implications that this new computational paradigm has on complex circuit architectures. In this chapter we deeply analyze the major issues encountered in the design of complex circuits using Field-Coupled devices. Problems are analyzed and techniques to solve them and to improve performance are presented. Finally, a realistic analysis of the applications best suited for this technology is presented. While the analysis is performed using Nano-Magnet Logic as target, the results can be applied to all Field-Coupled devices. This chapter therefore supplies researchers and designers with the essential guidelines necessary to design complex circuits using Nano-Magnet Logic and, more in general, Field-Coupled devices.

Summary The increasing issues in scaled Complementary Metal Oxide Semiconductor (CMOS) circuit fabrication favor the flourishing of emerging technologies. Because of their limited sizes, both CMOS and emerging technologies are particularly sensitive to defects that arise during the fabrication process. Their impact is not easy to analyze in order to take the necessary countermeasures, especially in the case of circuits of realistic complexity based on emerging technologies. In this work, we propose a new methodology supported by an efficient and reliable tool for the identification of the impact of faults in complex circuits implemented using the emerging technology we are focusing on in this case: nanomagnetic logic. The methodology is based on three main steps: (i) we performed exhaustive physical‐level simulations of basic blocks based on a detailed finite‐element tool in order to have a full characterization, to know their properties in presence of defects, and to have a solid reference point for the following steps; (ii) we developed a model (fanomag) for the basic block behavior suitable for simulations in presence of defects of complex circuits, that is, lighter than a physical level one, but accurate enough to capture the most important features to be inherited at circuit level; (iii) starting from a physical design of complex circuits that we perform using a specific design tool we developed, that is, ToPoliNano, we simulated using fanomag, now embedded in our ToPoliNano tool, the behavior of circuits in presence of multiple sets of fabrication defects using a Monte Carlo approach now included in ToPoliNano as a new feature. In this paper, a specific type of defect is considered as a case study. The framework and methodology are conceived to be easily extended to handle other types of defects and problems due to working conditions that a designer and/or a technologist might want to focus on. The major outcome is then a powerful methodology and tool capable to analyze with a good accuracy nanomagnetic logic complex circuits and architectures both in ideal conditions and in presence of defects with remarkable performance in terms of simulation times. Copyright © 2016 John Wiley & Sons, Ltd.

In the post CMOS scenario NanoMagnets Logic (NML) has attracted a considerable attention due to its characteristic features. The ability to combine logic and memory in the same device, and a possible low power consumption, allows NML to overcome some of the CMOS intrinsic limitations. However, considering realistic circuit implementations where both theoretical and technological constraints are kept into account, performance could not be reduced with respect to the expectations. The reason lies in the fact that a huge area is wasted with interconnection wires.In this paper we propose a new approach to the conception of magnetic circuits, that we have baptized Domain Magnet Logic (DML). We embed domain walls in NML circuits in a technologically compatible solution, with the aim of improving interconnection performance. We have validated our solution with physical level simulations, and we show the improvements designing as a case study a complex and realistic circuit, a 32 bit Pentium-4 tree-adder. DML logic allows to reduce the circuit area up to 50%, with consequent dramatic improvements on circuit latency and power dissipation. This is a very good result itself, that represents just the tip of the iceberg of the amazing possibilities opened by this innovative approach.

In recent years Field-Coupled devices, like Quantum dot Cellular Automata, are gaining an ever increasing attention from the scientific community. The computational paradigm beyond this device topology is based on the interaction among neighbor cells to propagate information through circuits. Among the various implementations of this theoretical principle, NanoMagnet Logic (NML) is one the most studied, due to some interesting features, like the possibility to combine memory and logic in the same device and the possible low power consumption. Since the working principle of Field-Coupled devices is completely different from CMOS technology, it is important to understand all the implications that this new computational paradigm has on complex circuit architectures. In this chapter we deeply analyze the major issues encountered in the design of complex circuits using Field-Coupled devices. Problems are analyzed and techniques to solve them and to improve performance are presented. Finally, a realistic analysis of the applications best suited for this technology is presented. While the analysis is performed using Nano-Magnet Logic as target, the results can be applied to all Field-Coupled devices. This chapter therefore supplies researchers and designers with the essential guidelines necessary to design complex circuits using Nano-Magnet Logic and, more in general, Field-Coupled devices.